Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18
13
APPLICATION INFORMATION
The information in this section is not part of the IC specification, but is presented for information purposes only. Additional information on single
wire CAN networks, application circuits, and thermal management are included in application note AN2005.
SL01200
CAN BUS LINE
TX0 RX0
TxD RxD
BAT
AU5790
TRANSCEIVER
ENNSTB
CANH
+12V
PORT
GND
PORT
+5V
2.4 to
2.7k
R
D
C
L
9.1k,
1%
CAN CONTROLLER
(e.g. SJA1000)
Note 1 TX0 should be configured to push-pull operation, active low; e.g., Output Control Register = 1E hex.
Note 2 Recommended range for the load resistor is 3k < R
T
< 11k.
220 pF
47 µH
R
T
RTH
10%
100 nF
1N5060
or equiv.
L
1 to 4.7 µF
Figure 4. Application circuit example for the AU5790
AU5790 transceivers may require additional PCB surface at ground pin(s) as heat conductor(s) in order to meet thermal requirements. See
thermal characteristics section for details.
Table 2. Maximum CAN Bit Rate
MODE MAXIMUM BIT RATE AT 0.35% CLOCK ACCURACY
Normal transmission 33.3 kbps
High-speed transmission 83.3 kbps
Sample point as % of bit time 85%
Bus Time constant, normal mode 1.0 to 4.0 µs
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18
14
THERMAL CHARACTERISTICS
The AU5790 provides protection from thermal overload. When the
IC junction temperature reaches the threshold (155 °C), the
AU5790 will disable the transmitter drivers, reducing power
dissipation to protect the device. The transmit function will become
available again after the junction temperature drops. The thermal
shutdown hysteresis is about 5 °C.
In order to avoid this transmit function shutdown, care must be taken
to not overheat the IC during application. The relationships between
junction temperature, ambient temperature, dissipated power, and
thermal resistance can be expressed as:
T
j
=T
a
+ P
d
* θ
ja
where: T
j
is junction temperature (°C);
T
a
is ambient temperature (°C);
P
d
is dissipated power (W);
θ
ja
is thermal resistance (°C/W).
Thermal Resistance
Thermal resistance is the ability of a packaged IC to dissipate heat
to its environment. In semiconductor applications, it is highly
dependant on the IC package, PCBs, and airflow. Thermal
resistance also varies slightly with input power, the difference
between ambient and junction temperatures, and soldering material.
Figures 5 and 6 show the thermal resistance as the function of the
IC package and the PCB configuration, assuming no airflow.
SL01249
0
50
100
150
200
0 50 100 150 200 250
Thermal resistance (C/W)
Cu area on fused pins (mm2)
very low
conductance
board
low
conductance
board
high
conductance
board
Figure 5. SO-8 Thermal Resistance vs. PCB Configuration, Note 1, 2, 3
SL01250
0
50
100
150
0 100 200 300 400 500
Thermal resistance (C/W)
Cu area on fused pins (mm2)
very low
conductance
board
low
conductance
board
high
conductance
board
Figure 6. SO-14 Thermal Resistance vs. PCB Configuration, Note 1, 2, 3
Philips Semiconductors Product data
AU5790Single wire CAN transceiver
2001 May 18
15
Table 3 shows the maximum power dissipation of an AU5790 without tripping the thermal overload protection, for specified combinations of
package, board configuration, and ambient temperature.
Table 3. Maximum power dissipation
Θ
JA
P
tot
Power Dissipation Max.
Additional Foil Area for
Thermal Resistance
T
a
= 85 °C T
a
= 125 °C
Board Type
Additional
Foil
Area
for
Heat Dissipation
K/W mW mW
SO-8 on High
Conductance Board
Normal traces 103 631 243
C
on
d
uc
t
ance
B
oar
d
225 Sq. mm of copper
foil attached to pin 8.
82 793 305
SO-8 on Low
Conductance Board
Normal traces 163 399 153
C
on
d
uc
t
ance
B
oar
d
225 Sq. mm of copper
attached to pin 8.
119 546 210
SO-8 on Very Low
Conductance Board
Normal traces 194 335 129
C
on
d
uc
t
ance
B
oar
d
225 Sq. mm of copper
attached to pin 8.
135 481 185
SO-14 on High
Conductance Board
Normal traces 63 1032 397
C
on
d
uc
t
ance
B
oar
d
105 Sq. mm of copper
attached to each of pins
1, 7, 8, & 14.
50 1300 500
SO-14 on Low
Conductance Board
Normal traces 103 631 243
C
on
d
uc
t
ance
B
oar
d
105 Sq. mm of copper
attached to each of pins
1, 7, 8, & 14.
70 929 357
SO-14 on Very Low
Conductance Board
Normal traces 126 516 198
C
on
d
uc
t
ance
B
oar
d
105 Sq. mm of copper
attached to each of pins
1, 7, 8, & 14.
82 793 305
NOTES:
1. The High Conductance board is based on modeling done to EIA/JEDEC Standard JESD51-7. The board emulated contains two one ounce
thick copper ground planes, and top surface copper conductor traces of two ounce (0.071 mm thickness of copper).
2. The Low Conductance board is based on modeling done to EIA/JEDEC Standard EIA/JESD51-3. The board does not contain any ground
planes, and the top surface copper conductor traces of two ounce (0.071 mm thickness of copper).
3. The Very Low Conductance board is based on the EIA/JESD51-3, however the thickness of the surface conductors has been reduced to
0.035 mm (also referred to as 1.0 Ounce copper).
4. The above mentioned JEDEC specifications are available from: http://www.jedec.org/

AU5790D/N,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC CAN TXRX SINGLE WIRE 8SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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