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ELECTRICAL CHARACTERISTICS
Operating Conditions
Unless otherwise noted, all block and sub-block specifications apply over the operating temperature (−40 to +85°C).
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Conditions Min Max Unit
Analog Block Supply Voltage V
CC
−0.3 6.5 V
Digital Block Supply Voltage V
DD
−0.3 6.0 V
Digital Input Pin Voltage V
IN
(TxS, TxE and POL Pins) −0.3 V
DD
+ 0.3 V
Digital Output Pin Voltage V
OUT
(RxS and RxA Pins) −0.3 V
DD
+ 0.3 V
Input Pin Current I
IN
Not for Shunt Pin ±5 mA
Output Pin Current I
OUT
For Shunt, SGND and VO 30 mA
ESD, Human Body Model 2,250 V
ESD, Machine Model 250 V
ESD, Charged Device Model 1,000 V
Storage Temperature T
Storage
−55 125 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 3. NORMAL OPERATING CONDITIONS
Parameter Symbol Conditions Min Typ Max Unit
Analog Supply Voltage VCC
Supply voltages are configurable,
or can be supplied from off-chip.
4.75 5 6.2 V
Digital Supply Voltage VDD 2.7 3 VCC − 1.1 V
Storage Temperature T
Operating
−40 85 °C
Current Consumption ICC 25°C, SHUNT current = 1 mA,
no current from series regulator.
500 800
mA
Table 4. CMOS INPUT SPECIFICATIONS
Parameter Symbol Min Max Unit
Input High Voltage V
IH
0.7 × V
DD
V
DD
V
Input Low Voltage V
IL
0 0.3 × V
DD
V
Input High Current I
IH
1
mA
Input Low Current I
IL
−1
mA
Schmitt Negative Threshold V
t−
0.2 × V
DD
V
Schmitt Positive Threshold V
t+
0.8 × V
DD
V
Schmitt Hysteresis V
h
1 V
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Power Supply Blocks
Table 5. REGULATOR SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Shunt Regulator
Output Voltage V
CC
Preset, I
SH
= 1 to 5 mA 4.85 5.0 5.15 V
External Setting 4.75 6.2 V
Sink Current I
SH
Internal Pass Transistor N-ch and Pad 0.001 25 mA
Load Capacitance C
SH
5
mF
Load Regulation I
SH
= 1 to 25 mA 0 1.6 4 %
Temperature Coefficient TC
Vcc
No Load Capacitance ±200 ppm/°C
Series Regulator
Input Voltage
V
CC
Internally Tied to V
CC
Pin 4.75 6.2 V
Output Voltage V
O
Preset, I
SR
= 0 2.91 3.0 3.09 V
External Setting and N-JFET 2.85 3.5 V
Output Current I
SR
Internal Pass Transistor P-ch and Pad 20 mA
Load Capacitance C
SR
For Stability use CAP w/ESR 5
mF
Load Regulation I
SR
= 0 to 20 mA 0 2 4 %
Temperature Coefficient TC
Vo
±200 ppm/°C
Low Voltage Detectors (Applies to N_PFail1 and PFail2)
Threshold
V
TH9
SxSETIN > V
TH9
(Output: L H) 85 90 95 % Vref
Hysteresis V
HYS5
SxSETIN < (V
TH9
− V
HYS5
)
(Output: H L)
0.012 0.025 0.038 V
Output Sink Current I
OL
V
OL
= 0.4 V (Open Drain) 30 135
mA
Output Leakage Current I
L
V
OH
= 5 V 1
mA
Table 6. VOLTAGE REFERENCE SPECIFICATIONS
Parameter Symbol Conditions Min Typ Max Unit
Bandgap Voltage Reference
Output Voltage Tolerance
V
REF
Equates to: ±2% 1.157 1.185 1.205 V
Temperature Drift 50 ppm/°C
Hysteresis V
REFHYS
(Note 2) 100
mV
Supply Voltage V
CCREF
4.75 5 6.2 V
Load Current I
REFOUT
No Load During Operation 0
mA
V
MID
Voltage Reference
Output Voltage V
MID
1.95 2.0 2.05 V
Output Current I
MID
−30 100
mA
Load Capacitance C
MID
DVC6000F Uses 1 mF
0.01 0.1 1
mF
Temperature Coefficient TC
MID
±200 ppm/°C
2. Hysteresis is defined as the change in the 25°C reading after 85°C to 25°C cycle and –40°C to 25°C cycle.
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Transmitter Blocks
Table 7. MDS−MAU INTERFACE
Parameter Symbol Min Typ Max Unit
POL Input Pin POL See Schmitt Trigger Input Specs V
TxE Input Pin TxE See Schmitt Trigger Input Specs V
TxS input Pin TxS See Schmitt Trigger Input Specs V
NOTE: The associated MDS chip must handle the jabber detect function.
Table 8. TRI-LEVEL MODULATOR
Parameter Symbol Conditions Min Typ Max Unit
Tri-level Modulator and Slew Control (Output is at VDRV)
Output Voltage
V
O
V
MID
3.02 V
Load Current I
O
DV 10 mV
−35 +120
mA
Output for Silence (Note 3) V
S
TXE Disabled V
MID
+ 0.485 V
MID
+ 0.500 V
MID
+ 0.515 V
Output for High Level (Note 3) V
H
TXE Active V
S
+ 0.380 V
S
+ 0.400 V
S
+ 0.420 V
Output for Low Level (Note 3) V
L
TXE Active V
S
− 0.420 V
S
− 0.400 V
S
− 0.380 V
Asymmetry of V
H
and V
L
DV
HL
−0.02 0.02 V
Rise and Fall Times (Note 4) tf, tr C
RT
= 22 pF (Note 4) 4.7
msec
3. Nominal values are: V
S
= 2.5 V, V
H
= 2.9 V and V
L
= 2.1 V.
4. By adding an external capacitor between the CRT pin and ground, slew rate at VDRV output can be controlled. The controlling equation is
tf or tr = 2 ms + (0.123 ms/pF * C
RT
). C
RT
is nominally 22 pF, yielding tf = tr = 4.7 ms. The constant comes from an internal capacitor. The hot
side of the capacitor and the CRT pin should have a guard pattern around them to avoid unnecessary interference.
Table 9. CURRENT CONTROL AMPLIFIER
Parameter Symbol Conditions Min Typ Max Unit
Input Common Mode Voltage Range V
CM
0 V
CC
− 1 V
Output Voltage Swing V
O
1 V
CC
− 0.5 V
Load Current I
O
−2,300 100
mA
Input Offset Voltage V
OS
−3 +3 mV
Slew Rate SR
C
L
= 10 pF
R
L
= 200 kW
0.54
V/ms
Gain Bandwidth Product GBW 1.15 MHz
Phase Margin PM 66 Deg

AMIS-49250-XTD

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Bus Transceivers Field Bus MAU Transceiver
Lifecycle:
New from this manufacturer.
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