AMIS−492x0
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7
Receiver Block
Table 10. RECEIVER SUB-BLOCKS
Parameter Symbol Conditions Min Typ Max Unit
Band Pass Filter
Input Voltage
V
BP
SIGIN Pint to GND 1 4 V
Output Voltage Swing FLTOUT 1 4 V
Output Slew Rate SR 0.6
V/ms
Input Offset Voltage V
OS
±5 mV
Filter Resistors (Note 5)
RF1 60 75 90
kW
RF2 216 270 324
kW
RF3 16 20 24
kW
RF4 43 54 65
kW
Carrier Detector
Threshold Voltage
V
TH+
Relative to V
MID
40 50 60 mV
V
TH−
−60 −50 −40 mV
Output High Voltage V
OH
I
OH
= 0 mA V
DD
− 0.6 V
Output Low Voltage V
OL
I
OL
= 0 mA 0.3 V
Output High Current I
OH
V
DD
− V
O
0.6 V 50
mA
Output Low Current I
OL
V
O
0.6 V 50
mA
Output Rising Time t
R
C
L
= 10 pF 0.3
ms
Output Leak Current t
F
C
L
= 10 pF 0.3
ms
Zero-cross Detector
Threshold Voltage
V
TH+
No Carrier V
MID
+ 0.025 V
MID
+ 0.040 V
MID
+ 0.058 V
V
TH−
Carrier Active V
MID
V
MID
V
MID
V
Output High Voltage V
OH
I
OH
= 0 mA V
DD
− 0.6 V
Output Low Voltage V
OL
I
OL
= 0 mA 0.3 V
Output High Current I
OH
V
DD
− V
O
0.6 V 50
mA
Output Low Current I
OL
V
O
0.6 V 50
mA
Output Rising Time t
R
C
L
= 10 pF 0.3
ms
Output Leak Current t
F
C
L
= 10 pF 0.3
ms
5. The band pass filter is made up of a two pole high pass filter in series with a two pole low pass filter. The filter consists of four resistors internal
to AMIS−492x0, and four external capacitors. The active part of each filter is an amplifier connected in a follower configuration.
AMIS−492x0
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8
THEORY OF OPERATION
Overview
The AMIS−492x0 incorporates two different power
supply circuits. Both derive their power from the bus. Using
the internal configuration, the shunt regulator is set for 5 V
and the series regulator is set for 3 V. Users can modify either
power supply by adding external components. The
AMIS−492x0 Fieldbus can also monitor these power supply
voltages and generate power-fail signals if they fall below a
specified value. Please refer to the AMIS−492x0 Fieldbus
MAU Reference Design Application Note for ways to adjust
the shunt and series voltage regulators.
The AMIS−492x0 Fieldbus MAU transmits a
Manchester-encoded signal provided from a standard
MDS−MAU interface. The output driver makes it possible
to design various signal circuits, which depend on the power
requirements of your device. The slew rate of the signal can
be controlled to minimize unnecessary radiation as specified
in IEC/ISA standards.
The AMIS−492x0 Fieldbus MAU has a built-in band pass
filter which makes it easy to design your own receiver. The
receive block operates on a Manchester-encoded signal. It
decodes the signal and verifies proper amplitude with a
zero-cross and carrier detect circuit, respectively. Detected
signals are then passed on to a controller with the standard
MDS−MAU interface.
Power Supply Block
The power supply block contains four sub-blocks:
1. A Shunt Regulator − for establishing a supply
voltage of V
CC
(typ. = 5 V) used by the analog
circuitry.
2. A Series Regulator − for establishing a supply
voltage of V
DD
(typ. = 3 V) used for digital
circuitry.
3. Two Low Voltage Detectors − for monitoring the
two supply voltages.
4. A Bandgap Voltage Reference − which is used
internally for generating a bias level for AC
signals.
Shunt Regulator
The shunt regulator controls its sink current to the
SHUNT pin so that the voltage applied to the SHSETIN pin
is equal to V
REF
. The V
CC
input is divided by an internal
network to provide a voltage equal to Vref at the SHSET pin.
If SHSET and SHSETIN pins are tied together, and V
CC
and
SHUNT pins are connected to a power source of high
impedance (e.g., current mirror circuit of signal driver), the
shunt regulator provides 5 V power to itself and external
circuits. A capacitor of 5 mF or larger capacity is necessary
to stabilize this regulator. Figure 11 shows C10 (22 mF)
connected to Pin 8 to accomplish stabilization.
It is possible to increase the V
CC
voltage up to 6.2 V by
dividing V
CC
with an external network to supply the
appropriate voltage to SHSETIN pin. In this case, SHSET
pin must be kept open. The output voltage is determined by
the following equation:
V
CC
+ V
REF
ǒ
1 )
R
1
R
2
Ǔ
(eq. 1)
Figure 2. Shunt Regulator
Shunt Regulator
(Internal Configuration)
System
VCC
VCC
SHUNT
SGNDSHSETINSHSET
18
8
967
Rsh
3.25 Rsh
VREF
Cfb
16 Meg
25 mA
(Max)
50 pF
A6
+
Shunt Regulator
(External Configuration)
System
VCC
VCC
SHUNT
SGNDSHSETINSHSET
18
8
967
Rsh
3.25 Rsh
VREF
Cfb
16 Meg
25 mA
(Max)
50 pF
A6
+
N/C
R1
R2
The SHUNT pin is normally connected to V
CC
. It is
possible to insert a resister between V
CC
and SHUNT to
measure the shunt current. Its value should be small enough
to keep V
DS
(voltage between SHUNT pin and SGND pin)
larger than 2.5 V (i.e., resistor must be less than 100 W).
Since the internal transistor can sink as much as 25 mA,
no additional circuit is necessary in most cases. Note that the
drain current must not exceed 25 mA because no protection
is implemented for the internal transistor. If you do not need
the shunt regulator, you should connect SHUNT and
SHSETIN pins to GND and open SHSET pin. Then V
CC
must be supplied from another source.
AMIS−492x0
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9
Series Regulator
The series regulator produces a regulated voltage at the
V
O
pin from V
CC
. If you connect SRAO and SRTR pins
together, the internal amplifier will regulate the input
voltage at SRSETIN pin to equal V
REF
. An internal feedback
signal is generated to produce a voltage equal to V
REF
at pin
SRSET. If you connect SRSET and SRSETIN pins, the
series regulator supplies 3 V at pin V
O
. A capacitor (C
D
in
Figure 3) of 5 mF or larger capacity is necessary to stabilize
this regulator. The capacitor is expected to have an ESR
resistor for the circuit to be stable. If the capacitor is low, a
series resistor with the cap load will help stabilize the
circuit).
Series Regulator
(Internal Configuration)
SRTR
15 14 12
13
16
A7
+
SRAO SRSETIN
VCC
VREF
40 pF
Cfb1
SRSET
VO
C
D
May
Supply
VDD
Cc2
20 pF
20 mA (Max)
1.54 Rsr
Rsr
Series Regulator
(External Configuration)
SRTR
15 14 12
13
16
A7
+
SRAO SRSETIN
VCC
VREF
40 pF
Cfb1
SRSET
VO
C
D
May
Supply
VDD
Cc2
20 pF
20 mA (Max)
1.54 Rsr
Rsr
R4
R5
N/C
Figure 3. Series Regulator
The supply current must not exceed 20 mA because no
current limiting is applied to the internal transistor. You can
increase V
O
voltage up to 3.5 V by dividing V
O
with an
external network to supply the appropriate voltage to pin
SRSETIN. In this case, pin SRSET must be kept open. The
drain-source voltage of the internal transistor must be larger
or equal to 2 V. If this condition is not satisfied, you may
need an external P-channel JFET to create the desired low
voltage-drop regulator. The output voltage is determined by
the following equation:
V
O
+ V
REF
ǒ
1 )
R
4
R
5
Ǔ
(eq. 2)
Low Voltage Detectors
Low voltage detectors are included to monitor supply
voltages and generate “power fail” signals. The low voltage
alarms are detected by sensing the voltage on pins SHSETIN
and SRSETIN. These pins also provide feedback for the
shunt and series regulators. If the voltage on the SHSETIN
pin is lower than the threshold, VTH9 (90 percent VREF),
N_PFAIL1 goes low. Typically SHSETIN monitors the
analog rail voltage VCC. If the voltage on the SRSETIN pin
is lower than the threshold, VTH9, N_PFAIL2 goes low.
Typically SRSETIN monitors the digital rail voltage VDD.
Both outputs are open drain, so a resistor will be required.
If you do not use one of these pins, it should be connected
to GND. You can also add capacitors to delay these signals.
In this case, sink current must not exceed the maximum
value.
If you do not wish to use one of the low voltage detectors
its corresponding output pin should be connected to GND.
Figure 4. Low Voltage Detectors
5
C3
+
VCC2
4
+
VCC2
C4
VDD
VDD
C1
R1
C2
R2
N_PFail2
N_PFail1
SRSETIN
SRSETIN
0.9 x VREF
0.9 x VREF
If you do not use one of the regulators, the corresponding
alarm signal can potentially be used to monitor another
signal. For example, if the series regulator is not used,
SRAO should be left open, SRTR tied to VCC, VO grounded
and SRSET left open. Then SRSETIN can be the input for
monitoring another voltage signal with N_PFAIL2.
Voltage Reference
The voltage reference circuitry generates two voltage
signals, VREF and VMID. VREF comes from a bandgap
circuit and is used as the reference voltage for all circuits in
the AMIS−492x0 Fieldbus MAU. The typical value for
VREF is 1.185 V. See Figure 5.
An operational amplifier is regulating VMID to provide
a bias (common) level for the AC signals. Its typical voltage
is 2 V. A capacitor larger than 0.01 mF is necessary on VMID
to remove high-frequency ripple.

AMIS-49250-XTP

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Bus Transceivers AMIS-49250 FIELDBUS MAU T
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