MC100EL17DWR2G

MC100EL17
www.onsemi.com
4
Table 6. AC CHARACTERISTICS (V
CC
= 5.0 V; V
EE
= 0 V or V
CC
= 0 V; V
EE
= 5.0 V (Note 1))
40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
f
MAX
Maximum Toggle Frequency 1.75 GHz
t
PLH
t
PHL
Propagation Delay
Differential
D to Q
Single-Ended
330
280
530
580
350
300
550
600
360
310
560
610
ps
t
SKEW
Skew
Output-to-Output (Note 2)
Part-to-Part (Diff) (Note 2)
Duty Cycle (Diff) (Note 3)
75
200
25
75
200
25
75
200
25
ps
t
JITTER
Random Clock Jitter (RMS) 0.7 ps
V
PP
Input Swing (Note 4) 150 1000 150 1000 150 1000 mV
t
r
t
f
Output Rise/Fall Times Q
(20% 80%)
280 550 280 550 280 550 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. V
EE
can vary +0.8 V / 0.5 V.
2. Skews are valid across specified voltage range, part-to-part skew is for a given temperature.
3. Duty cycle skew is the difference between a t
PLH
and t
PHL
propagation delay through a device.
4. V
PP
(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40.
Figure 2. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D
Termination of ECL Logic Devices.)
Driver
Device
Receiver
Device
QD
Q D
Z
o
= 50 W
Z
o
= 50 W
50 W 50 W
V
TT
V
TT
= V
CC
3.0 V
Resource Reference of Application Notes
AN1405/D ECL Clock Distribution Techniques
AN1406/D Designing with PECL (ECL at +5.0 V)
AN1503/D
ECLinPSt I/O SPiCE Modeling Kit
AN1504/D Metastability and the ECLinPS Family
AN1568/D Interfacing Between LVDS and ECL
AN1672/D The ECL Translator Guide
AND8001/D Odd Number Counters Design
AND8002/D Marking and Date Codes
AND8020/D Termination of ECL Logic Devices
AND8066/D Interfacing with ECLinPS
AND8090/D AC Characteristics of ECL Devices
MC100EL17
www.onsemi.com
5
PACKAGE DIMENSIONS
20
1
11
10
B20X
H10X
C
L
18X
A1
A
SEATING
PLANE
q
h X 45
_
E
D
M
0.25
M
B
M
0.25
S
A
S
B
T
e
T
B
A
DIM MIN MAX
MILLIMETERS
A 2.35 2.65
A1 0.10 0.25
B 0.35 0.49
C 0.23 0.32
D 12.65 12.95
E 7.40 7.60
e 1.27 BSC
H 10.05 10.55
h 0.25 0.75
L 0.50 0.90
q 0 7
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INCLUDE MOLD
PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE PROTRUSION
SHALL BE 0.13 TOTAL IN EXCESS OF B
DIMENSION AT MAXIMUM MATERIAL
CONDITION.
__
SOIC20 WB
CASE 751D05
ISSUE G
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MC100EL17DWR2G

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Bus Receivers 5V ECL Quad Diff
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