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74LCX273FT(AJ)

P1-P3P4-P6P7-P9P10-P12
74LCX273FT
7
12.3.
12.3.
12.3.
12.3. AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
a
a
a
a
= -40 to 85
= -40 to 85
= -40 to 85
= -40 to 85
)
)
)
)
Characteristics
Maximum clock frequency
Propagation delay time(CK-Q)
Propagation delay time(CLR-Q)
Minimum pulse width(CK)
Minimum pulse width(CLR)
Minimum setup time
Minimum hold time
Minimum removal time
Output skew
Symbol
f
MAX
t
PLH
,t
PHL
t
PHL
t
w(L)
,t
w(H)
t
w(L)
t
S
t
h
t
rem
t
osLH
,t
osHL
Note
(Note 1)
Test Condition
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.2
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.2
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.3
V
CC
(V)
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
2.7
3.3 ± 0.3
Min
50
100
150
150
1.5
1.5
10.0
5.0
3.3
3.3
10.0
5.0
3.3
3.3
10.0
5.0
2.5
2.5
1.5
1.5
1.5
1.5
8.0
4.0
2.5
2.0
Max
30.0
10.5
9.5
8.5
30.0
10.5
9.5
8.5
1.0
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Parameter guaranteed by design. (t
osLH
= |t
PLH
m-t
PLH
n|, t
osHL
= |t
PHL
m-t
PHL
n|)
2016-09-26
Rev.3.0
©2016 Toshiba Corporation
74LCX273FT
8
12.4.
12.4.
12.4.
12.4. AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
AC Characteristics (Unless otherwise specified, T
a
a
a
a
= -40 to 125
= -40 to 125
= -40 to 125
= -40 to 125
)
)
)
)
Characteristics
Maximum clock frequency
Propagation delay time(CK-Q)
Propagation delay time(CLR-Q)
Minimum pulse width(CK)
Minimum pulse width(CLR)
Minimum setup time
Minimum hold time
Minimum removal time
Output skew
Symbol
f
MAX
t
PLH
,t
PHL
t
PHL
t
w(L)
,t
w(H)
t
w(L)
t
S
t
h
t
rem
t
osLH
,t
osHL
Note
(Note 1)
Test Condition
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.2
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.2
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.1
See 12.7 AC Test Circuit,
Table 12.8.1, Fig. 12.8.3
V
CC
(V)
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
1.8 ± 0.15
2.5 ± 0.2
2.7
3.3 ± 0.3
2.7
3.3 ± 0.3
Min
45
90
135
135
1.5
1.5
10.0
5.0
3.3
3.3
10.0
5.0
3.3
3.3
10.0
5.0
2.5
2.5
1.5
1.5
1.5
1.5
8.0
4.0
2.5
2.0
Max
33.0
12.0
10.5
9.5
33.0
12.0
10.5
9.5
1.0
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Note 1: Parameter guaranteed by design. (t
osLH
= |t
PLH
m-t
PLH
n|, t
osHL
= |t
PHL
m-t
PHL
n|)
12.5.
12.5.
12.5.
12.5. Dynamic Switching Characteristics (Unless otherwise specified, T
Dynamic Switching Characteristics (Unless otherwise specified, T
Dynamic Switching Characteristics (Unless otherwise specified, T
Dynamic Switching Characteristics (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
, Input: t
, Input: t
, Input: t
, Input: t
r
r
r
r
= t
= t
= t
= t
f
f
f
f
= 2.5 ns, C
= 2.5 ns, C
= 2.5 ns, C
= 2.5 ns, C
L
L
L
L
= 50 pF, R
= 50 pF, R
= 50 pF, R
= 50 pF, R
L
L
L
L
= 500
= 500
= 500
= 500 Ω
Ω
Ω
Ω)
)
)
)
Characteristics
Quiet output maximum dynamic V
OL
Quiet output minimum dynamic V
OL
Symbol
V
OLP
|V
OLV
|
Test Condition
V
IH
= 3.3 V, V
IL
= 0 V
V
IH
= 3.3 V, V
IL
= 0 V
V
CC
(V)
3.3
3.3
Typ.
0.8
0.8
Unit
V
V
2016-09-26
Rev.3.0
©2016 Toshiba Corporation
74LCX273FT
9
12.6.
12.6.
12.6.
12.6. Capacitive Characteristics (Unless otherwise specified, T
Capacitive Characteristics (Unless otherwise specified, T
Capacitive Characteristics (Unless otherwise specified, T
Capacitive Characteristics (Unless otherwise specified, T
a
a
a
a
= 25
= 25
= 25
= 25
)
)
)
)
Characteristics
Input capacitance
Output capacitance
Power dissipation capacitance
Symbol
C
IN
C
OUT
C
PD
Note
(Note 1)
Test Condition
f
IN
= 10 MHz
V
CC
(V)
3.3
0
3.3
Typ.
7
8
25
Unit
pF
pF
pF
Note 1: C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the operating current
consumption without load. Average operating current can be obtained by the equation.
I
CC(opr)
= C
PD
× V
CC
× f
IN
+ I
CC
/8 (per 1 bit)
12.7.
12.7.
12.7.
12.7. AC Test Circuit
AC Test Circuit
AC Test Circuit
AC Test Circuit
2016-09-26
Rev.3.0
©2016 Toshiba Corporation
P1-P3P4-P6P7-P9P10-P12

74LCX273FT(AJ)

Mfr. #:
Buy 74LCX273FT(AJ)
Manufacturer:
Toshiba
Description:
Flip Flops CMOS Logic IC 8.5ns 24mA 1.65 to 3.6V
Lifecycle:
New from this manufacturer.
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