NCV4269
http://onsemi.com
10
TYPICAL THERMAL CHARACTERISTICS
SO8 Std Package NCV4269, 1.0 oz
SO8 Std Package NCV4269, 2.0 oz
SO14 w/6 Thermal Leads NCV4269, 1.0 oz
SO14 w/6 Thermal Leads NCV4269, 2.0 oz
SO20 w/8 Thermal Leads NCV4269, 1.0 oz
SO20 w/8 Thermal Leads NCV4269, 2.0 oz
Figure 19. JunctiontoAmbient Thermal Resistance (q
JA
) vs. Heat Spreader Area
Figure 20. R(t) vs. Pulse Time
q
JA
(°C/W)
COPPER HEATSPREADER AREA (mm
2
)
700600400300200100 5000
200
180
160
140
120
100
80
60
40
20
0
Single Pulse (SO8 Std Package) PCB = 50 mm
2
, 2.0 oz
Single Pulse (SO8 EP Package)
Single Pulse (SO14 w/6 Thermal Leads) PCB = 50 mm
2
, 2.0 oz
Single Pulse (SO20 w/8 Thermal Leads) PCB = 50 mm
2
, 2.0 oz
YLA (SO8)
YLA (SO14)
YLA (SO20)
R(t) (°C/W)
PULSE TIME (s)
0.000001 0.00001 0.0001 0.001 0.01 0.1
1 10 100 1000
1000
100
10
1
0.1
NCV4269
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11
APPLICATION DESCRIPTION
OUTPUT REGULATOR
The output is controlled by a precision trimmed reference.
The PNP output has base drive quiescent current control for
regulation while the input voltage is low, preventing over
saturation. Current limit and voltage monitors complement
the regulator design to give safe operating signals to the
processor and control circuits.
RESET OUTPUT (RO)
A reset signal, Reset Output, RO, (low voltage) is
generated as the IC powers up. After the output voltage V
Q
increases above the reset threshold voltage V
RT
, the delay
timer D is started. When the voltage on the delay timer V
D
passes V
UD
, the reset signal RO goes high. A discharge of
the delay timer V
D
is started when V
Q
drops and stays below
the reset threshold voltage V
RT
. When the voltage of the
delay timer V
D
drops below the lower threshold voltage V
LD
the reset output voltage V
RO
is brought low to reset the
processor.
The reset output RO is an open collector NPN transistor
with an internal 20 kW pullup resistor connected to the
output Q, controlled by a low voltage detection circuit. The
circuit is functionally independent of the rest of the IC,
thereby guaranteeing that RO is valid for V
Q
as low as 1.0 V.
RESET ADJUST (R
ADJ
)
The reset threshold V
RT
can be decreased from a typical
value of 4.65 V to as low as 3.5 V by using an external
voltage divider connected from the Q lead to the pin R
ADJ
,
as shown in Figure 21. The resistor divider keeps the voltage
above the V
RADJ,TH
(typical 1.35 V) for the desired input
voltages, and overrides the internal threshold detector.
Adjust the voltage divider according to the following
relationship:
V
RT
+ V
RADJ, TH
@ (R
ADJ1
) R
ADJ2
) ń R
ADJ2
(eq. 1)
If the reset adjust option is not needed, the R
ADJ
pin
should be connected to GND causing the reset threshold to
go to its default value (typically 4.65 V).
RESET DELAY (D)
The reset delay circuit provides a delay (programmable by
capacitor C
D
) on the reset output lead RO. The delay lead D
provides charge current I
D,C
(typically 6.5 mA) to the
external delay capacitor C
D
during the following times:
1. During Powerup (once the regulation threshold has
been exceeded).
2. After a reset event has occurred and the device is
back in regulation. The delay capacitor is set to
discharge when the regulation (V
RT
, reset
threshold voltage) has been violated. When the
delay capacitor discharges to V
LD
, the reset signal
RO pulls low.
SETTING THE DELAY TIME
The delay time is set by the delay capacitor C
D
and the
charge current I
D
. The time is measured by the delay
capacitor voltage charging from the low level of V
DSAT
to
the higher level V
UD
. The time delay follows the equation:
t
d
+ [C
D
(V
UD
* V
D, SAT
)]ńI
D, C
(eq. 2)
Example:
Using C
D
= 100 nF.
Use the typical value for V
D,SAT
= 0.1 V.
Use the typical value for V
UD
= 1.8 V.
Use the typical value for Delay Charge Current I
D
= 6.5 mA.
t
d
+ [100 nF(1.8 * 0.1 V)] ń 6.5 mA + 26.2 ms
(eq. 3)
Q
GND
I
R
ADJ
NCV4269
C
Q
**
10 mF
RO
0.1 mF
Microprocessor
D
C
D
V
BAT
V
DD
SO
Figure 21. Application Diagram
SI
I/O
I/O
R
ADJ2
R
ADJ1
R
SI1
R
SI2
C
I
*
*C
I
required if regulator is located far from the power supply filter.
** C
Q
required for Stability. Cap must operate at minimum temperature expected.
NCV4269
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12
SENSE INPUT (SI) / SENSE OUTPUT (SO) VOLTAGE
MONITOR
An onchip comparator is available to provide early
warning to the microprocessor of a possible reset signal
(Figure 4). The output is from an open collector driver with
an internal 20 kW pull up resistor to output Q. The reset
signal typically turns the microprocessor off
instantaneously. This can cause unpredictable results with
the microprocessor. The signal received from the SO pin will
allow the microprocessor time to complete its present task
before shutting down. This function is performed by a
comparator referenced to the band gap voltage. The actual
trip point can be programmed externally using a resistor
divider to the input monitor SI (Figure 21). The values for
R
SI1
and R
SI2
are selected for a typical threshold of 1.20 V
on the SI Pin.
SIGNAL OUTPUT
Figure 22 shows the SO Monitor timing waveforms as a
result of the circuit depicted in Figure 21. As the output
voltage (V
Q
) falls, the monitor threshold (V
SI,Low
), is
crossed. This causes the voltage on the SO output to go low
sending a warning signal to the microprocessor that a reset
signal may occur in a short period of time. T
WAR NING
is the
time the microprocessor has to complete the function it is
currently working on and get ready for the reset
shutdown signal.
Figure 22. SO Warning Waveform Time Diagram
V
Q
SI
V
RO
V
SI,Low
T
WARNING
SO
STABILITY CONSIDERATIONS
The input capacitor C
I
in Figure 21 is necessary for
compensating input line reactance. Possible oscillations caused
by input inductance and input capacitance can be damped by
using a resistor of approximately 1.0 W in series with C
I.
The output or compensation capacitor helps determine
three main characteristics of a linear regulator: startup delay,
load transient response and loop stability.
The capacitor value and type should be based on cost,
availability, size and temperature constraints. A tantalum or
aluminum electrolytic capacitor is best, since a film or
ceramic capacitor with almost zero ESR can cause
instability. The aluminum electrolytic capacitor is the least
expensive solution, but, if the circuit operates at low
temperatures (25°C to 40°C), both the value and ESR of
the capacitor will vary considerably. The capacitor
manufacturers data sheet usually provides this information.
The value for the output capacitor C
Q
shown in Figure 21
should work for most applications; however, it is not
necessarily the optimized solution. Stability is guaranteed at
values C
Q
= 10 mF and an ESR = 10 W within the operating
temperature range. Actual limits are shown in a graph in the
typical data section.
CALCULATING POWER DISSIPATION IN A SINGLE
OUTPUT LINEAR REGULATOR
The maximum power dissipation for a single output
regulator (Figure 21) is:
P
D(max)
+ [V
I(max)
* V
Q(min)
]I
Q(max)
) V
I(max)
I
q
(eq. 4)
where:
V
I(max)
is the maximum input voltage,
V
Q(min)
is the minimum output voltage,
I
Q(max)
is the maximum output current for the application,
and I
q
is the quiescent current the regulator consumes at
I
Q(max)
.
Once the value of P
D(max)
is known, the maximum
permissible value of R
qJA
can be calculated:
(eq. 5)
R
q
JA
= (150°C – T
A
) / P
D
The value of R
qJA
can then be compared with those in the
package section of the data sheet. Those packages with
R
qJA
s less than the calculated value in equation 2 will keep
the die temperature below 150°C. In some cases, none of the
packages will be sufficient to dissipate the heat generated by
the IC, and an external heatsink will be required. The current
flow and voltages are shown in the
Measurement Circuit Diagram.
HEATSINKS
A heatsink effectively increases the surface area of the
package to improve the flow of heat away from the IC and
into the surrounding air.
Each material in the heat flow path between the IC and the
outside environment will have a thermal resistance. Like
series electrical resistances, these resistances are summed to
determine the value of R
qJA
:
R
qJA
+ R
qJC
) R
qCS
) R
qSA
(eq. 6)
where:
R
qJC
= the junctiontocase thermal resistance,
R
qCS
= the casetoheat sink thermal resistance, and
R
qSA
= the heat sinktoambient thermal resistance.
R
qJC
appears in the package section of the data sheet. Like
R
qJA
, it too is a function of package type. R
qCS
and R
qSA
are
functions of the package type, heatsink and the interface
between them. These values appear in data sheets of
heatsink manufacturers. Thermal, mounting, and
heatsinking considerations are discussed in the
ON Semiconductor application note AN1040/D, available
on the ON Semiconductor website.

NCV4269D1G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
LDO Voltage Regulators 5V 150mA MicroPower w/Sense Output
Lifecycle:
New from this manufacturer.
Delivery:
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