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NLSX4401MU1TCG

P1-P3P4-P6P7-P9P10-P12P13-P13
NLSX4401
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS (V
L
= 1.5 V to 5.5 V and V
CC
= 1.5 V to 5.5 V, unless otherwise specified) (Note 1)
Symbo
l
Parameter Test Conditions (Note 2)
−555C to +1255C
Uni
t
Min Typ Max
V
IHC
I/O V
CC
Input HIGH Voltage V
CC
– 0.4 − − V
V
ILC
I/O V
CC
Input LOW Voltage − − 0.15 V
V
IHL
I/O VL Input HIGH Voltage V
L
– 0.4 − − V
V
ILL
I/O VL Input LOW Voltage − − 0.15 V
V
IH
Control Pin Input HIGH Voltage 0.65 * V
L
− − V
V
IL
Control Pin Input LOW Voltage − − 0.35 * V
L
V
V
OHC
I/O VCC Output HIGH Voltage I/O V
CC
source current = 20 mA 2/3 * V
CC
− − V
V
OLC
I/O VCC Output LOW Voltage I/O V
CC
sink current = 1 mA − − 0.4 V
V
OHL
I/O VL Output HIGH Voltage I/O V
L
source current = 20 mA 2/3 * V
L
− − V
V
OLL
I/O V
L
Output LOW Voltage I/O V
L
sink current = 1 mA − − 0.4 V
I
QVCC
V
CC
Supply Current
Supply Current
I/O V
CC
and I/O V
L
unconnected, V
EN
= V
L
V
L
= 5.5 V, V
CC
= 0 V
V
L
= 0 V, V
CC
= 5.5 V
−
−
−
0.5
−
−
2.0
1.0
−1.0
mA
I
QVL
V
L
Supply Current
Supply Current
I/O V
CC
and I/O V
L
unconnected, V
EN
= V
L
V
L
= 5.5 V, V
CC
= 0 V
V
L
= 0 V,
V
CC
= 5.5 V
−
−
−
0.3
−
−
1.5
−1.0
1.0
mA
I
TS−VCC
V
CC
Tristate Output Mode I/O V
CC
and I/O V
L
unconnected, V
EN
= GND − 0.1 1.0 mA
I
TS−VL
V
L
Tristate Output Mode Supply Cur-
rent
I/O V
CC
and I/O V
L
unconnected, V
EN
= GND − 0.1 1.0 mA
I
I
Enable Pin Input Leakage Current − − 1.0 mA
I
OFF
I/O Power-Off Leakage Current I/O V
CC
Port, V
CC
= 0 V, V
L
= 0 to 5.5 V − − 1.0 mA
I/O VL Port, VCC = 0 to 5.5 V, V
L
= 0 V − − 1.0
I
OZ
I/O Tristate Output Mode
Leakage Current
− 0.1 1.0 mA
R
PU
Pull−Up Resistors
I/O V
L
and V
C
− 10 − kΩ
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. Typical values are for V
L
= +1.8 V, V
CC
= +3.3 V and T
A
= +25°C.
2. All units are production tested at T
A
= +25°C. Limits over the operating temperature range are guaranteed by design.
NLSX4401
http://onsemi.com
5
TIMING CHARACTERISTICS − RAIL−TO−RAIL DRIVING CONFIGURATIONS
(I/O test circuit of Figures 3 and 4, C
LOAD
= 15 pF, driver output impedance ≤ 50 W, R
LOAD
= 1 MW)
Symbol Parameter Test Conditions
−405C to +855C
(Notes 3 & 4)
Unit
Min Typ Max
V
L
= 1.5 V, V
CC
= 1.5 V
t
RVCC
I/O V
CC
Rise Time 9 32 ns
t
FVCC
I/O V
CC
Fall Time 11 20 ns
t
RVL
I/O V
L
Rise Time 20 30 ns
t
FVL
I/O V
L
Fall Time 10 13 ns
t
PDVL−VCC
Propagation Delay (Driving I/O V
L
, V
L
to V
CC
) 7 16 ns
t
PDVCC−VL
Propagation Delay (Driving I/O V
CC
, V
CC
to V
L
) 12 15 ns
t
EN
Enable Time 50 ns
t
DIS
Disable Time 300 ns
t
PPSKEW
Part−to−Part Skew 2 ns
MDR Maximum Data Rate 15 Mbps
V
L
= 1.5 V, V
CC
= 5.5 V
t
RVCC
I/O V
CC
Rise Time 9 12 ns
t
FVCC
I/O V
CC
Fall Time 17 30 ns
t
RVL
I/O V
L
Rise Time 2 4 ns
t
FVL
I/O V
L
Fall Time 3 7 ns
t
PDVL−VCC
Propagation Delay (Driving I/O V
L
, V
L
to V
CC
) 14 24 ns
t
PDVCC−VL
Propagation Delay (Driving I/O V
CC
, V
CC
to V
L
) 3 5 ns
t
EN
Enable Time 40 ns
t
DIS
Disable Time 250 ns
t
PPSKEW
Part−to−Part Skew 2 ns
MDR Maximum Data Rate 20 Mbps
V
L
= 1.8 V, V
CC
= 2.8 V
t
RVCC
I/O V
CC
Rise Time 11 18 ns
t
FVCC
I/O V
CC
Fall Time 10 15 ns
t
RVL
I/O V
L
Rise Time 12 15 ns
t
FVL
I/O V
L
Fall Time 5 8 ns
t
PDVL−VCC
Propagation Delay (Driving I/O V
L
, V
L
to V
CC
) 7 10 ns
t
PDVCC−VL
Propagation Delay (Driving I/O V
CC
, V
CC
to V
L
) 5 9 ns
t
EN
Enable Time 50 ns
t
DIS
Disable Time 300 ns
t
PPSKEW
Part−to−Part Skew 2 ns
MDR Maximum Data Rate 20 Mbps
V
L
= 2.5 V, V
CC
= 3.6 V
t
RVCC
I/O V
CC
Rise Time 8 12 ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Typical values are for the specified V
L
and V
CC
at T
A
= +25°C. All units are production tested at T
A
= +25°C.
4. Limits over the operating temperature range are guaranteed by design.
5. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (I/O_VLn or I/O_VCCn)
and switching with the same polarity (LOW−to−HIGH or HIGH−to−LOW). Skew is defined by applying a single input to the two input channels
and measuring the difference in propagation delays between the output channels.
NLSX4401
http://onsemi.com
6
TIMING CHARACTERISTICS − RAIL−TO−RAIL DRIVING CONFIGURATIONS (continued)
(I/O test circuit of Figures 3 and 4, C
LOAD
= 15 pF, driver output impedance ≤ 50 W, R
LOAD
= 1 MW)
Symbol Unit
−405C to +855C
(Notes 3 & 4)
Test ConditionsParameterSymbol Unit
MaxTypMin
Test ConditionsParameter
V
L
= 2.5 V, V
CC
= 3.6 V
t
FVCC
I/O V
CC
Fall Time 8 12 ns
t
RVL
I/O V
L
Rise Time 7 10 ns
t
FVL
I/O V
L
Fall Time 5 7 ns
t
PDVL−VCC
Propagation Delay (Driving I/O V
L
, V
L
to V
CC
) 7 10 ns
t
PDVCC−VL
Propagation Delay (Driving I/O V
CC
, V
CC
to V
L
) 5 8 ns
t
EN
Enable Time 40 ns
t
DIS
Disable Time 225 ns
t
PPSKEW
Part−to−Part Skew 2 ns
MDR Maximum Data Rate 24 Mbps
V
L
= 2.8 V, V
CC
= 1.8 V
t
RVCC
I/O V
CC
Rise Time 13 20 ns
t
FVCC
I/O V
CC
Fall Time 7 10 ns
t
RVL
I/O V
L
Rise Time 8 13 ns
t
FVL
I/O V
L
Fall Time 9 15 ns
t
PDVL−VCC
Propagation Delay (Driving I/O V
L
, V
L
to V
CC
) 6 9 ns
t
PDVCC−VL
Propagation Delay (Driving I/O V
CC
, V
CC
to V
L
) 7 12 ns
t
EN
Enable Time 60 ns
t
DIS
Disable Time 250 ns
t
PPSKEW
Part−to−Part Skew 2 ns
MDR Maximum Data Rate 24 Mbps
V
L
= 3.6 V, V
CC
= 2.5 V
t
RVCC
I/O V
CC
Rise Time 9 12 ns
t
FVCC
I/O V
CC
Fall Time 6 9 ns
t
RVL
I/O V
L
Rise Time 6 12 ns
t
FVL
I/O V
L
Fall Time 7 12 ns
t
PDVL−VCC
Propagation Delay (Driving I/O V
L
, V
L
to V
CC
) 5 7 ns
t
PDVCC−VL
Propagation Delay (Driving I/O V
CC
, V
CC
to V
L
) 6 9 ns
t
EN
Enable Time 50 ns
t
DIS
Disable Time 250 ns
t
PPSKEW
Part−to−Part Skew 2 ns
MDR Maximum Data Rate 24 Mbps
V
L
= 5.5 V, V
CC
= 1.5 V
t
RVCC
I/O V
CC
Rise Time 13 20 ns
t
FVCC
I/O V
CC
Fall Time 6 9 ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
3. Typical values are for the specified V
L
and V
CC
at T
A
= +25°C. All units are production tested at T
A
= +25°C.
4. Limits over the operating temperature range are guaranteed by design.
5. Skew is the variation of propagation delay between output signals and applies only to output signals on the same port (I/O_VLn or I/O_VCCn)
and switching with the same polarity (LOW−to−HIGH or HIGH−to−LOW). Skew is defined by applying a single input to the two input channels
and measuring the difference in propagation delays between the output channels.
P1-P3P4-P6P7-P9P10-P12P13-P13

NLSX4401MU1TCG

Mfr. #:
Buy NLSX4401MU1TCG
Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels 2-BIT 20 MB/S DUAL SUPPLY
Lifecycle:
New from this manufacturer.
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