IRS2573D
www.irf.com © 2009 International Rectifier
13
Lead Assignments
IRS2573D
www.irf.com © 2009 International Rectifier
14
State Diagram
VCC < UVLO-
(VCC Fault or Power Down)
UVLO Mode
Full-Bridge Off (CT=0V)
Buck Off (ICOMP, PCOMP,
TOFF=0V)
IGN Timer Off (TIGN=0V)
CLK Off (TCLK=0V)
I
QCC
150 A
Fault and Good Counters Reset
Fault Latch Reset
GENERAL Mode
Full-Bridge Oscillating @ f
BRIDGE
Buck Enabled
IGN 'LOW'
CLK and Fault Counters Enabled
VSENSE OVP Enabled
ISENSE Over-current Limitation Enabled
Constant Power Control Enabled
VCC > UVLO+
and
VSENSE > VOV
and
RST < VRST-
Power Turned On
FAULT Mode
Fault Latch Set
Full-Bridge Off (CT=0V)
Buck Off
IGN Timer Off (TIGN=0V)
CLK Off (TCLK=0V)
I
QCC
350 A
VCC = 15.6V
All Counters Reset
VCC < UVLO-
(Power Off)
or
RST > VRST+
(Fault Reset)
VSENSE < VOV(1/7.5) for 197sec
(short circuit or does not warm up)
or
VSENSE < VOV(1/7.5) for 16384 Events
IGN Mode
IGN (21s 'HIGH'/64s 'LOW')
Ignition Counter Enabled
Buck and Full-Bridge Enabled
CLK and Fault Counters Enabled
Good Counter Reset
VSENSE OVP Enabled
VSENSE < VOV(2/5)VSENSE > VOV(2/5)
VSENSE > VOV(2/5) for 787sec
(open circuit)
Reset
Good
Counter
Good Counter = 2730sec
(No faults detected)
BUCK OFF Mode
Buck Off
Full-Bridge Oscillating
Fault Counters Enabled
Reset
Fault and Good
Counters
VSENSE < VOV(1/7.5)
VOV(2/5) < VSENSE < VOV
and
PCOMP > 0.2V
and
ICOMP > 0.5V
VSENSE > VOV
or
PCOMP < 0.2V
or
ICOMP < 0.2V
VSENSE < VOV(2/5)
and
PCOMP > 0.2V
and
ICOMP > 0.5V
All values are typical. Applies to application circuit on page 1.
IRS2573D
www.irf.com © 2009 International Rectifier
15
Application Information and Additional Details
Information regarding the following topics is included as subsections within this section of the datasheet.
IGBT/MOSFET Gate Drive
Undervoltage Lockout Protection
General Mode
Ignition Timer
Full-Bridge Control
Buck Control
Constant Power Control
Current Limitation Control
Over Voltage Fault Counter
Under Voltage Fault Counter
Fast Transient Under-Voltage Fault Counter
Good Counter
Fault Reset
PCB Layout Tips
Additional Documentation
IGBT/MOSFET Gate Drive
The IRS2573D HVICs are designed to drive up to six MOSFET or IGBT power devices. Figures 1 and 2 illustrate
several parameters associated with the gate drive functionality of the HVIC. The output current of the HVIC, used
to drive the gate of the power switch, is defined as I
O
. The voltage that drives the gate of the external power
switch is defined as V
HO
for the high-side power switch and V
LO
for the low-side power switch; this parameter is
sometimes generically called V
OUT
and in this case does not differentiate between the high-side or low-side output
voltage.
V
S
(or COM)
HO
(or LO)
V
B
(or V
CC
)
I
O+
V
HO
(or V
LO
)
+
-
V
S
(or COM)
HO
(or LO)
V
B
(or V
CC
)
I
O-
Figure 1: HVIC sourcing current Figure 2: HVIC sinking current
Undervoltage Lock-Out
The under-voltage lockout mode (UVLO) is defined as the state the IC is in when VCC is below the turn-on
threshold of the IC. The IC is designed to maintain an ultra-low supply current during UVLO mode of 150uA for
reducing power losses across the external start-up resistor, and, to guarantee the IC is fully functional before the
buck high-side and full-bridge high and low-side output drivers are activated. The external capacitor from VCC
to COM is charged by a current flowing from the rectified AC line or DC bus through an external supply resistor
minus the micro-power start-up current drawn by the IC. The external start-up resistor is chosen so that VCC
exceeds the IC turn-on threshold at the desired AC line turn-on voltage for the ballast. Once the capacitor voltage

IRS2573DSTRPBF

Mfr. #:
Manufacturer:
Infineon / IR
Description:
Gate Drivers Buck & Full-Brdg HID ballast Cntrl IC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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