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MC100LVELT22DTRG

P1-P3P4-P6P7-P7
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 12
1 Publication Order Number:
MC100LVELT22/D
MC100LVELT22
3.3V Dual LVTTL/LVCMOS
to Differential LVPECL
Translator
Description
The MC100LVELT22 is a dual LVTTL/LVCMOS to differential
LVPECL translator. Due to LVPECL (Low Voltage Positive ECL)
levels, only +3.3V and ground is required. The small 8−lead package
outline with low skew dual gate design makes the MC100LVELT22
ideal for applications which require translation of a clock and/or data
signal.
Features
• 350 ps Typical Propagation Delay
• <100 ps Output−to−Output Skew
• Flow Through Pinouts
• The 100 Series Contains Temperature Compensation
• LVPECL Operating Range: V
CC
= 3.15 V to 3.45 V
with GND = 0 V
• When Unused TTL Input is left Open, Q Output will Default High
• These are Pb−Free Devices
*For additional marking information, refer to
Application Note AND8002/D.
MARKING
DIAGRAMS*
KR22
ALYWG
G
SOIC−8
D SUFFIX
CASE 751
TSSOP−8
DT SUFFIX
CASE 948R
1
8
1
8
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
www.onsemi.com
KVT22
ALYW
G
1
8
(Note: Microdot may be in either location)
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
M
= Date Code
G = Pb−Free Package
1
8
MC100LVELT22
www.onsemi.com
2
1
2
3
45
6
7
8
D0
GND
V
CC
Q0
D1Q1
Q1
Q0
LVPECL
LVTTL/
LVCMOS
Figure 1. 8−Lead Pinout (Top View) and Logic Diagram
PIN FUNCTION
Table 1. PIN DESCRIPTION
Qn, Qn
LVPECL Differential Outputs
D0, D1 LVTTL/LVCMOS Inputs
V
CC
Positive Supply
GND Ground
Table 2. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor N/A
Internal Input Pullup Resistor N/A
ESD Protection Human Body Model
Machine Model
> 4 kV
> 200 V
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
SOIC−8
TSSOP−8
Level 1
Level 3
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in
Transistor Count 164
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, see Application Note AND8003/D.
Table 3. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
Positive Power Supply GND = 0 V 7 V
V
I
Input Voltage GND = 0 V V
I
V
CC
7 V
I
out
Output Current Continuous
Surge
50
100
mA
mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
SO−8
SO−8
190
130
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) std bd SO−8 41 to 44 ± 5% °C/W
q
JA
Thermal Resistance (Junction−to−Ambient) 0 lfpm
500 lfpm
TSSOP−8
TSSOP−8
185
140
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case) std bd TSSOP−8 41 to 44 ± 5% °C/W
T
sol
Wave Solder Pb−Free <2 to 3 sec @ 260°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
MC100LVELT22
www.onsemi.com
3
Table 4. LVPECL DC CHARACTERISTICS V
CC
= 3.3 V; GND = 0.0 V (Note 3)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
I
CC
Power Supply Current 28 28 29 mA
V
OH
Output HIGH Voltage (Note 4) 2275 2420 2275 2420 2275 2420 mV
V
OL
Output LOW Voltage (Note 4) 1490 1680 1490 1680 1490 1680 mV
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
3. Output parameters vary 1:1 with V
CC
. V
CC
can vary ±0.15 V.
4. Outputs are terminated through a 50 ohm resistor to V
CC
−2 V.
Table 5. LVTTL/LVCMOS INPUT DC CHARACTERISTICS V
CC
= 3.3 V; T
A
= −40°C to 85°C (Note 5)
Symbol
Characteristic Min Typ Max Unit Condition
I
IH
Input HIGH Current 20
mA
V
IN
= 2.7 V
I
IHH
Input HIGH Current 100
mA
V
IN
= V
CC
I
IL
Input LOW Current −0.2 mA V
IN
= 0.5 V
V
IK
Input Clamp Diode Voltage −1.2 V I
IN
= −18 mA
V
IH
Input HIGH Voltage 2.0 3.3 V
V
IL
Input LOW Voltage 0 0.8 V
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
5. V
CC
can vary ±0.15 V.
Table 6. AC CHARACTERISTICS V
CC
= 3.3 V; GND = 0.0 V (Note 6)
−40°C 25°C 85°C
Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit
f
max
Maximum Toggle Frequency 350 MHz
t
PLH
Propagation Delay (Note 7) 200 350 600 200 350 600 200 350 600 ps
t
skew
Skew Output−to−Output
Part−to−Part
30 100
400
30 100
400
30 100
400
ps
t
JITTER
Random Clock Jitter (RMS) 2.1 1.1 1.9 1.6 ps
t
jit(
f
)
Additive RMS Phase Jitter
f
c
= 50 MHz, Integration Range: 12 kHz
to 20 MHz (See Figure 2)
219 fs
t
r
/t
f
Output Rise/Fall Time (20−80%) 200 550 200 500 200 500 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
6. V
CC
can vary ±0.15 V. Outputs are terminated through a 50 W resistor to V
CC
− 2 V.
7. Specifications for standard TTL input signal.
P1-P3P4-P6P7-P7

MC100LVELT22DTRG

Mfr. #:
Buy MC100LVELT22DTRG
Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels BBG ECL TRNSLTR DUAL
Lifecycle:
New from this manufacturer.
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