13©2016 Integrated Device Technology, Inc. Revision E, February 18, 2016
85311 Datasheet
Reliability Information
Table 6.
JA
vs. Air Flow Table for a 8 Lead SOIC
Transistor Count
The transistor count for 85311 is: 225
Package Outline and Package Dimensions
Package Outline - M Suffix for 8 Lead SOIC Table 7. Package Dimensions
Reference Document: JEDEC Publication 95, MS-012
JA
by Velocity
Linear Feet per Minute 0200500
Multi-Layer PCB, JEDEC Standard Test Boards 103°C/W 94°C/W 89°C/W
150 il (N B d ) SOIC
All Dimensions in Millimeters
Symbol Minimum Maximum
N 8
A 1.35 1.75
A1 0.10 0.25
B 0.33 0.51
C 0.19 0.25
D 4.80 5.00
E 3.80 4.00
e 1.27 Basic
H 5.80 6.20
h 0.25 0.50
L 0.40 1.27
14©2016 Integrated Device Technology, Inc. Revision E, February 18, 2016
85311 Datasheet
Ordering Information
Table 8. Ordering Information
Part/Order Number Marking Package Shipping Packaging Temperature
85311AMLF 85311ALF “Lead-Free” 8 Lead SOIC Tube 0C to 70C
85311AMLFT 85311ALF “Lead-Free” 8 Lead SOIC Tape & Reel 0C to 70C
15©2016 Integrated Device Technology, Inc. Revision E, February 18, 2016
85311 Datasheet
Revision History Sheet
Rev Table Page Description of Change Date
A 8 Added Termination for LVPECL Outputs section. 5/30/02
A
5
7
3.3V Output Load Test Circuit Diagram - corrected VEE equation to read
-1.3V ± 0.165V from ± 0.135V.
Updated Output Rise/Fall Time Diagram.
9/23/02
B
T2
T8
1
2
3
3
5
6
7
8
13
Add Lead-Free bullet in Features section.
Pin Characteristics table - changed C
IN
4pF max. to 4pF typical.
Absolute Maximum Ratings, updated Outputs rating.
Combined 3.3V & 2.5V Power tables and Differential DC Characteristics tables.
Updated Parameter Measurement Information.
Updated Single Ended Signal Driving Differential Input diagram.
Added Termination for 2.5V LVPECL Output section.
Added Differential Clock Input Interface section.
Ordering Information table - added Lead Free part number.
6/17/04
BT8
7
13
Added Recommendations for Unused Input and Output Pins.
Ordering Information Table - corrected Lead-Free marking and added
Lead-Free Note.
7/28/05
C
T3 3
9 - 10
LVPECL DC Characteristics Table -corrected V
OH
max. from V
CC
- 1.0V to V
CCO
-
0.9V; and V
SWING
max. from 0.9V to 1.0V.
Power Considerations - corrected power dissipation to reflect VOH max in Table 3C.
4/11/07
D
T4A - T4B 4
5
8
Added 2.5V AC Characteristics Table. Added Additive Phase Jitter spec to both AC
Tables.
Added Additive Phase Jitter plot.
Updated Differential Input Clock Interface section.
10/22/08
D
T8 14 Ordering Information - removed leaded devices.
Updated data sheet format.
7/8/15
E
T6
T8
11
13
14
Power Considerations - updated Junction Temperature section and corrected Table
5, Thermal Resistance Table.
Corrected table.
Ordering Information Table - deleted table note.
Deleted HiperClockS reference throughout the datasheet.
Updated datasheet header/footer.
2/16/16

85311AMLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer 1-to-2 LVPECL Fanout Buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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