LT3518
11
3518ff
For more information www.linear.com/LT3518
applications inForMation
Use only ceramic capacitors with X7R, X5R or better dielec-
tric as they are best for temperature and DC bias stability
of the capacitor value. All ceramic capacitors exhibit loss
of capacitance
value with increasing DC voltage bias, so it
may be necessary to choose a higher value capacitor to get
the required capacitance at the operation voltage. Always
check that the voltage rating of the capacitor is sufficient.
Table 2 shows some recommended capacitor vendors.
Table 2. Ceramic Capacitor Manufacturers
VENDOR PHONE WEB
Taiyo Yuden (408) 573-4150 www.t-yuden.com
AVX (843) 448-9411 www.avxcorp.com
Murata (770) 436-1300 www.murata.com
TDK (847) 803-6100 www.tdk.com
Loop Compensation
The LT3518 uses an internal transconductance error
amplifier whose VC output compensates the control loop.
The external inductor, output capacitor, and the compen
-
sation resistor and capacitor determine the loop stability.
The inductor and output capacitor are chosen based on
performance, size and cost. The compensation resistor
and capacitor at VC are selected to optimize control loop
stability
. For typical LED applications, a 10nF compensation
capacitor at VC is adequate, and a series resistor is not
required. A compensation resistor may be used to increase
the slew rate on the VC pin to maintain tighter regulation
of LED current during fast transients on V
IN
or CTRL.
Diode Selection
The Schottky diode conducts current during the interval
when the switch is turned off. Select a diode rated for
the maximum SW voltage. If using the PWM feature for
dimming, it is important to consider diode leakage, which
increases with the temperature, from the output during the
PWM low interval. Therefore, choose the Schottky diode
with sufficiently low leakage current. Table 3 has some
recommended component vendors.
Table 3. Schottky Diodes
PART NUMBER V
R
(V) I
AVE
(A)
On Semiconductor
MBRS260T3 60 2
Diodes Inc.
DFLS140L 40 1
Zetex
ZLLS2000TA 40 2.2
International Rectifier
10MQ060N 60 1.5
Board Layout
The high speed operation of the LT3518 demands careful
attention to board layout and component placement. The
Exposed Pad of the package is the only GND terminal of
the IC and is also important for thermal management of
the IC. It is crucial to achieve a good electrical and thermal
contact between the Exposed Pad and the ground plane of
the board. To reduce electromagnetic interference (EMI),
it is important to minimize the area of the SW node. Use
a GND plane under SW and minimize the length of traces
in the high frequency switching path between SW and
GND through the diode and the capacitors. Since there is
a small DC input bias current to the ISN and ISP inputs,
resistance in series with these inputs should be minimized
and matched, otherwise there will be an offset. Finally,
the bypass capacitor on the V
IN
supply to the LT3518
should be placed as close as possible to the V
IN
terminal
of the device.
Soft-Start
For many applications, it is necessary to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and
output voltage overshoot. A typical value for the soft-start
capacitor is 0.1µF.
