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71V25761S183PFG

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
6.42
IDT71V25761 128K x 36, 3.3V Synchronous SRAMs with
2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Commercial and Industrial Temperature Ranges
19
NOTES:
1. Device outputs = All device outputs except TDO.
2. Device inputs = All device inputs except TDI, TMS, and TRST.
Instruction Field Value Description
Revision Number (31:28) 0x2 Reserved for version number.
IDT Device ID (27:12) 0x23D, 0x23F Defines IDT part number 71V25761SA and 71V25781SA, respectively.
IDT JEDEC ID (11:1) 0x33 Allows unique identification of device vendor as IDT.
ID Register Indicator Bit (Bit 0) 1 Indicates the presence of an ID register.
I5297 tbl 02
JTAG Identification Register Definitions (SA Version only)
Instruction Description OPCODE
EXTEST
Forces contents of the boundary scan cells onto the device outputs
(1 )
.
Places the boundary scan register (BSR) between TDI and TDO.
0000
SAMPLE/PRELOAD
Places the boundary scan register (BSR) between TDI and TDO.
SAMPLE allows data from device inputs
(2 )
and outputs
(1)
to be captured
in the boundary scan cells and shifted serially through TDO. PRELOAD
allows data to be input serially into the boundary scan cells via the TDI.
0001
DEVICE_ID
Loads the JTAG ID register (JIDR) with the vendor ID code and places
the register between TDI and TDO.
0010
HIGHZ
Places the bypass register (BYR) between TDI and TDO. Forces all
device output drivers to a High-Z state.
0011
RESERVED
Several combinations are reserved. Do not use codes other than those
identified for EXTEST, SAMPLE/PRELOAD, DEVICE_ID, HIGHZ, CLAMP,
VALIDATE and BYPASS instructions.
0100
RESERVED 0101
RESERVED 0110
RESERVED 0111
CLAMP
Uses BYR. Forces contents of the boundary scan cells onto the device
outputs. Places the bypass register (BYR) between TDI and TDO.
1000
RESERVED
Same as above.
1001
RESERVED 1010
RESERVED 1011
RESERVED 1100
VALIDATE
Automatically loaded into the instruction register whenever the TAP
controller passes through the CAPTURE-IR state. The lower two bits '01'
are mandated by the IEEE std. 1149.1 specification.
1101
RESERVED Same as above. 1110
BYPASS
The BYPASS instruction is used to truncate the boundary scan register
as a single bit in length.
1111
I5297 tbl 04
Available JTAG Instructions
6.42
20
IDT71V25761 128K x 36, 3.3V Synchronous SRAMs with
2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Commercial and Industrial Temperature Ranges
Ordering Information
Package Information
100-Pin Thin Quad Plastic Flatpack (TQFP)
119 Ball Grid Array (BGA)
165 Fine Pitch Ball Grid Array (fBGA)
Information available on the IDT website
200*
183
166
Frequency in Megahertz
5297 drw 13
71V25761
128K x 36 Pipelined Burst Synchronous SRAM with 2.5V I/O
First Generation or current stepping
Second Generation die stepping
Blank
Y
Standard Power
Standard Power with JTAG
S
SA
S
Power
X
Speed
XX
Package
XXX
Device
Type
X
Process/
Temperature
Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
Blank
I
X
G
X
Green
100-pin Plastic Thin Quad Flatpack (TQFP)
119 Ball Grid Array (BGA)
165 Fine Pitch Ball Grid Array (fBGA)
PF**
BG
BQ
*Available in commercial range only
** JTAG
(
SA version
)
is not available with 100-
p
in TQFP
p
acka
g
e
Tube or Tray
Tape and Reel
Blank
8
X
6.42
IDT71V25761 128K x 36, 3.3V Synchronous SRAMs with
2.5V I/O, Pipelined Outputs, Burst Counter, Single Cycle Deselect Commercial and Industrial Temperature Ranges
21
Datasheet Document History
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
12/31/99 Created new datasheet from 71V2576 and 71V2578 datasheets
Pg. 1, 4, 8, 19 Added Industrial Temperature range offerings
04/04/00 Pg. 18 Added 100pin TQFP Package Diagram Outline
Pg. 4 Add capacitance table for BGA package; Add Industrial temperature to table; Insert note to Absolute
Max Ratings and Recommended Operating Temperature tables
06/01/00 Add new package offering, 13 x 15mm 165 fBGA
Pg. 20 Correct BG119 Package Diagram Outline
07/15/00 Pg. 7 Add note reference to BG119 pinout
Pg. 8 Add DNU note to BQ165 pinout
Pg. 20 Update BG119 Package Diagram Outline Dimensions
10/25/00 Remove Preliminary from datasheet
Pg. 8 Add reference note to pin N5 in BQ165 pinout, reserved for JTAG, TRST
04/22/03 Pg.4 Updated 165 BGA table information from TBD to 7
06/30/03 Pg. 1,2,3,5-9 Updated datasheet with JTAG information
Pg. 5-8 Removed note for NC pins (38,39(PF package); L4, U4 (BG package) H2, N7 (BQ package))
requiring NC or connection to Vss.
Pg. 19,20 Added two pages of JTAG Specification, AC Electrical, Definitions and Instructions
Pg. 21-23 Removed old package information from the datasheet
Pg. 24 Updated ordering information with JTAG and Y stepping information. Added information
regarding packages available IDT website.
03/13/09 Pg.21 Removed "IDT" from orderable part number
05/27/10 Pg.20 Added "Restricted hazardous substance device" to the ordering information
Pg.1-20 Removed IDT71V25781S/SA from datasheet
07/24/14 Pg. 20 Updated Ordering Information changed indicator from "Restricted hazardous substance
device" to "Green" and added Tape & Reel
CORPORATE HEADQUARTERS for SALES:
6024 Silver Creek Valley Road 800-345-7015 or
San Jose, CA 95138 408-284-8200
fax: 408-284-2775
www.idt.com
for Tech Support:
sramhelp@idt.com
408-284-4532
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

71V25761S183PFG

Mfr. #:
Buy 71V25761S183PFG
Manufacturer:
IDT
Description:
SRAM 128Kx36 SYNC 3.3V PIPELINED BURST SRAM
Lifecycle:
New from this manufacturer.
Delivery:
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