EZ-PD™ CCG4
Document Number: 001-98440 Rev. *F Page 16 of 30
Figure 7. CCG4 in a Single Port Notebook Application using CYPD4125-40LQXIT
CCG4
(CYPD4125-40LQXIT)
40-QFN
V5V_P1
VDDD
VDDIO
VCCD
8
31
32
33
11
20
CC2_P1
7
CC1_P1
9
SWD_IO/AR_RST#
1
SWD_CLK/I2C_CFG_EC
2
HPD_P1/GPIO
18
VCONN_MON__P1/GPIO
19
XRES
14
0.1µF
3.3V VDDIO
1µF
VBUS_P_CTRL_P1
VBUS_DISCHARGE_P1
TYPE-C
RECEPTACLE 1
VBUS (5-20V)
VBUS_SOURCE
VBUS_P_CTRL_P1
DC/DC
OR
AC-DC
SECONDARY
(5-20V)
OPTIONAL VDDIO SUPPLY. CAN SHORT
TO VDDD IN SINGLE SUPPLY SYSTEMS.
VSEL_2_P1
VSEL_1_P1
330pF
330pF
5.0V
1µF
V5V_P2
23
1µF
5.0V
VBUS_DISCHARGE_P1
36
37
NC
24
NC
22
GPIO
38
GPIO
VBUS_SINK
CHARGER
OVP_TRIP_P1
SBU
VDDIO
EMBEDDED
CONTROLLER
EPAD
I2C_SCL_SCB1_EC
17
16
4
3
5
6
25
I2C_SDA_SCB1_EC
15
I2C_SCL_SCB2_AR
I2C_SDA_SCB2_AR/VSEL_1_P1
I2C_INT_AR_P1
GPIO
SCL_3
SDA_3/MUX_CTRL_3_P1/VSEL_2_P1
26
29
SCL_4/MUX_CTRL_1_P1
SDA_4/MUX_CTRL_2_P1
28
VSS
I2C_INT_EC
I2C MASTER FOR ALT MODE
MUX CONTROL CONNECTED TO
TYPE-C PORT1
I2C_SCL
I2C_SDA
10
21
VDDIO
0.1µF
HPD_P1
VBUS_MON_P1/GPIO
13
VBUS_MON_P1
VBUS_C_CTRL_P1
12
GPIO
35
VBUS_C_CTRL_P1
GPIO
GPIO
VBUS_P_CTRL_P1
VBUS_DISCHARGE_P1
GPIO
30
GPIO
GPIO
100 KO
10 O
100 KO
49.9KO
100 KO
200O
100 KO
10 O
100 KO
100 KO
10 KO
0.1µF
VBUS
2.2 KO
2.2 KO
2.2 KO
TO DISPLAY_PORT
CONTROLLER 1
VSEL_1_P1
VSEL_2_P1
27
34
39
GPIO
40
GPIO
2.2 KO
VDDIO
2.2 KO
RX
MUX
AUX P/N
ML_LANE_[0:3]N
I2C_SCL
HS
USB 3.0
HOST
2
SSTX/RX
4
DISPLAY PORT
CONTROLLER 1
HPD_P1
ML_LANE_[0:3]P
4
4
2
I2C_SDA
TX
4
4
2
2
2
CC1
CC2
GND
VBUS
DP/DM
DP/DM
SSTX/RX
SBU
4.7 uF4.7 uF
4.7 uF
100 KO
10 O
49.9KO
100 KO
VBUS_C_CTRL_P1
100 KO
EZ-PD™ CCG4
Document Number: 001-98440 Rev. *F Page 17 of 30
Electrical Specifications
Absolute Maximum Ratings
Device-Level Specifications
All specifications are valid for –40 °C TA 85 °C and TJ 100 °C, except where noted. Specifications are valid for 3.0 V to 5.5 V,
except where noted.
Note
8. Usage above the absolute maximum conditions listed in Tab le 7 may cause permanent damage to the device. Exposure to absolute maximum conditions for extended
periods of time may affect device reliability. The maximum storage temperature is 150 °C in compliance with JEDEC Standard JESD22-A103, High Temperature
Storage Life. When used below absolute maximum conditions but above normal operating conditions, the device may not operate to specification.
Table 7. Absolute Maximum Ratings
[8]
Parameter Description Min Typ Max Units Details/Conditions
V
DDD_MAX
Digital supply relative to V
SS
–0.5 – 6 V Absolute max
V5V_P1 Max supply voltage relative to V
SS
– – 6 V Absolute max
V5V_P2 Max supply voltage relative to V
SS
– – 6 V Absolute max
V
DDIO_MAX
Max supply voltage relative to V
SS
– – 6 V Absolute Max
V
GPIO_ABS
GPIO voltage –0.5 V
DDIO
+ 0.5 V Absolute max
I
GPIO_ABS
Maximum current per GPIO –25 25 mA Absolute max
I
GPIO_injection
GPIO injection current, Max for V
IH
> V
DDD
, and Min for V
IL
< V
SS
–0.5 0.5 mA
Absolute max, current
injected per pin
ESD_HBM
Electrostatic discharge human
body model
2200 V
ESD_CDM
Electrostatic discharge charged
device model
500 V
LU Pin current for latch-up –200 200 mA
ESD_IEC_CON
Electrostatic discharge
IEC61000-4-2
8000 V
Contact discharge on
CC1, CC2 pins
ESD_IEC_AIR
Electrostatic discharge
IEC61000-4-2
15000 V
Air discharge for pins
CC1, CC2
Table 8. DC Specifications
Spec ID Parameter Description Min Typ Max Units Details/Conditions
SID.PWR#1 V
DDD
Power supply input voltage 2.7 5.5 V UFP applications
SID.PWR#1_A V
DDD
Power supply input voltage 3.0 5.5 V DFP/DRP applications
SID.PWR#26
V5V_P1,
V5V_P2
Power supply input voltage 4.85 5.5 V
PWR#13 V
DDIO
GPIO power supply 1.71 5.5 V
SID.PWR#24 V
CCD
Output voltage (for core logic) 1.8 V
SID.PWR#15 C
EFC
External regulator voltage bypass
on V
CCD
80 100 120 nF X5R ceramic or better
SID.PWR#16 C
EXC
Power supply decoupling capacitor
on V
DDD
0.8 1 µF X5R ceramic or better
SID.PWR#27 C
EXV
Power supply decoupling capacitor
on V5V_P1 and V5V_P2
–0.1 µF X5R ceramic or better
Active Mode, V
DDD
= 2.7 to 5.5 V. Typical values measured at V
DD
= 3.3 V.
SID.PWR#4 I
DD12
Supply current 10 mA
V5V_P1 and V5V_P2 = 5 V,
T
A
= 25 °C,
CC I/O IN Transmit or Receive,
no I/O sourcing current, CPU at
24 MHz, two PD ports active
EZ-PD™ CCG4
Document Number: 001-98440 Rev. *F Page 18 of 30
I/O
Sleep Mode, V
DDD
= 2.7 to 5.5 V
SID25A I
DD20A
I
2
C wakeup
WDT ON
IMO at 48 MHz
–2.54.0mA
V
DDD
= 3.3 V, T
A
= 25 °C, all
blocks except CPU are ON, CC
I/O ON, no I/O sourcing current
Deep Sleep Mode, V
DDD
= 2.7 to 3.6 V (Regulator on)
SID34 I
DD29
V
DDD
= 2.7 to 3.6 V
I
2
C wakeup and WDT ON
–80µAV
DDD
= 3.3 V, T
A
= 25 °C
SID_DS I
DD_DS
V
DDD
= 2.7 to 3.6 V
CC wakeup ON
–2.5µA
Power source = V
DDD
, Type-C
not attached, CC enabled for
wakeup, R
P
disabled
SID_DS1 I
DD_DS1
V
DDD
= 2.7 to 3.6 V
CC wakeup ON
–100 µA
Power source = V
DDD
, Type-C
not attached, CC enabled for
wakeup, R
P
and R
D
connected
at 70 ms intervals by CPU. R
P
,
R
D
connection should be
enabled for both PD ports.
XRES Current
SID307 I
DD_XR
Supply current while XRES
asserted
– 1 10 µA–
Table 8. DC Specifications (continued)
Spec ID Parameter Description Min Typ Max Units Details/Conditions
Table 9. AC Specifications
Spec ID Parameter Description Min Typ Max Units Details/Conditions
SID.CLK#4 F
CPU
CPU frequency DC 48 MHz 3.0 V V
DDD
5.5 V
SID.PWR#20 T
SLEEP
Wakeup from sleep mode 0 µs
Guaranteed by
characterization
SID.PWR#21 T
DEEPSLEEP
Wakeup from Deep Sleep mode 35 µs
24-MHz IMO. Guaranteed by
characterization.
SID.XRES#5 T
XRES
External reset pulse width 5 µs
Guaranteed by
characterization
SYS.FES#1 T
_PWR_RDY
Power-up to “Ready to accept
I2C / CC command”
–525ms
Guaranteed by
characterization
Table 10. I/O DC Specifications
Spec ID Parameter Description Min Typ Max Units Details/Conditions
SID.GIO#37 V
IH
[9]
Input voltage HIGH threshold 0.7 × V
DDIO
V CMOS input
SID.GIO#38 V
IL
Input voltage LOW threshold 0.3 × V
DDIO
V CMOS input
SID.GIO#39 V
IH
[9]
LVTTL input, V
DDIO
< 2.7 V 0.7× V
DDIO
–– V
SID.GIO#40 V
IL
LVTTL input, V
DDIO
< 2.7 V 0.3 × V
DDIO
V–
SID.GIO#41 V
IH
[9]
LVTTL input, V
DDIO
2.7 V 2.0 V
SID.GIO#42 V
IL
LVTTL input, V
DDIO
2.7 V 0.8 V
SID.GIO#33 V
OH
Output voltage HIGH level V
DDIO
–0.6 V I
OH
= 4 mA at 3-V V
DDIO
SID.GIO#34 V
OH
Output voltage HIGH level V
DDIO
–0.5 V I
OH
= 1 mA at 1.8-V V
DDIO
SID.GIO#35 V
OL
Output voltage LOW level 0.6 V I
OL
= 4 mA at 1.8-V V
DDIO
SID.GIO#36 V
OL
Output voltage LOW level 0.6 V I
OL
= 8mA at 3V V
DDIO
Note
9. V
IH
must not exceed V
DDIO
+ 0.2 V.

CYPD4126-40LQXI

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
USB Interface IC CCG4
Lifecycle:
New from this manufacturer.
Delivery:
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