AD822-EP
Rev. 0 | Page 10 of 20
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter Rating
Supply Voltage ±18 V
Internal Power Dissipation
8-Lead SOIC_N (R)
Observe Maximum
Junction Temperature
Input Voltage
((V+) + 0.2 V) to
((V−) − 20 V)
Output Short-Circuit Duration Indefinite
Differential Input Voltage ±30 V
Storage Temperature Range (R) –65°C to +150°C
Operating Temperature Range −55°C to +125°C
Maximum Junction Temperature 150°C
Lead Temperature
(Soldering, 60 sec)
260°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case conditions, that is, a device
soldered in a circuit board for surface-mount packages.
Table 5. Thermal Resistance
Package Type θ
JA
θ
JC
Unit
8-lead SOIC_N (R) 160 43 °C/W
ESD CAUTION
AD822-EP
Rev. 0 | Page 11 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
OFFSET VOLTAGE (mV)
70
0
–0.5 –0.4
NUMBER OF UNITS
–0.3 –0.2 –0.1 0
60
50
40
30
20
10
0.10.20.30.40.5
V
S
= 0V, 5V
09208-004
Figure 4. Typical Distribution of Offset Voltage (390 Units)
OFFSET VOLTAGE DRIFT (µV/°C)
16
6
0
–12 10–10
% IN BIN
–8 –6 –4 –2
14
8
4
2
12
10
86420
V
S
= ±5V
V
S
= ±15V
09208-005
Figure 5. Typical Distribution of Offset Voltage Drift (100 Units)
INPUT BIAS CURRENT (pA)
50
20
0
1
NUMBER OF UNITS
45
25
15
5
35
30
10
40
0 2345678910
09208-006
Figure 6. Typical Distribution of Input Bias Current (213 Units)
COMMON-MODE VOLTAGE (V)
5
0
–5
–5
5
–4
INPUT BIAS CURRENT (pA)
–3 –2 –1 0 1 2 3
4
V
S
= ±5V
V
S
= 0V, +5V AND ±5V
09208-007
Figure 7. Input Bias Current vs. Common-Mode Voltage; V
S
= 5 V, 0 V, and
V
S
= ±5 V
COMMON-MODE VOLTAGE (V)
1k
100
0.1
–16 16–12
INPUT BIAS CURRENT (pA)
–8 –4 0 4 8 12
10
1
09208-008
Figure 8. Input Bias Current vs. Common-Mode Voltage; V
S
= ±15 V
TEMPERATURE (°C)
100k
0.1
20 14040
INPUT BIAS CURRENT (pA)
60 80 100 120
10k
1k
100
10
1
09208-009
Figure 9. Input Bias Current vs. Temperature; V
S
= 5 V, V
CM
= 0 V
AD822-EP
Rev. 0 | Page 12 of 20
LOAD RESISTANCE ()
10M
1M
10k
100 100k
OPEN-LOOP GAIN (V/V)
100k
1k 10k
V
S
= 0V, +5V
V
S
= ±15V
V
S
= 0V, +3V
09208-010
Figure 10. Open-Loop Gain vs. Load Resistance
TEMPERATURE (°C)
10M
1M
10k
–60 140–40
OPEN-LOOP GAIN (V/V)
–20 0 20 40 60 80 100 120
100k
R
L
= 100k
R
L
= 10k
R
L
= 600
V
S
= ±15V
V
S
= 0V, +5V
V
S
= ±15V
V
S
= 0V, +5V
V
S
= ±15V
V
S
= 0V, +5V
09208-011
Figure 11. Open-Loop Gain vs. Temperature
OUTPUT VOLTAGE (V)
300
–300
–16 16–12
INPUT ERROR VOLTAGE (V)
–8 –4 0 4 8 12
200
100
0
–100
–200
R
L
= 100k
R
L
= 10k
R
L
= 600
09208-012
Figure 12. Input Error Voltage vs. Output Voltage for Resistive Loads
OUTPUT VOLTAGE FROM SUPPLY RAILS (mV)
40
20
–40
60
INPUT ERROR VOLTAGE (µV)
120 180 240
0
–20
POS RAIL
NEG RAIL
NEG RAIL
NEG RAIL
POS RAIL
R
L
= 20k
R
L
= 2k
R
L
= 100k
POS
RAIL
03
09208-013
00
Figure 13. Input Error Voltage with Output Voltage Within 300 mV of Either
Supply Rail for Various Resistive Loads; V
S
= ±5 V
FREQUENCY (Hz)
1k
100
1
10 1k
10
1 10k100
INPUT VOLTAGE NOISE (nV/Hz)
09208-014
Figure 14. Input Voltage Noise vs. Frequency
FREQUENCY (Hz)
40
–50
–110
100 100k1k
THD (dB)
10k
–70
–80
–90
–100
–60
R
L
= 10k
A
CL
= –1
V
S
= 0V, +3V; V
OUT
= 2.5V p-p
V
S
= ±15V; V
OUT
= 20V p-p
V
S
= ±5V; V
OUT
= 9V p-p
V
S
= 0V, +5V; V
OUT
= 4.5V p-p
09208-015
Figure 15. Total Harmonic Distortion (THD) vs. Frequency

AD822TRZ-EP-R7

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers SGL-Supply RR Lo Pwr FET-Inpt Dual
Lifecycle:
New from this manufacturer.
Delivery:
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