FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL Product Specification
V. General Specifications
IEEE 802.3 compatible.
See Notes 2 through 4 below
Category 5 UTP. BER <10
-12
Table 6: General Specifications
Notes:
1. Clock tolerance is +/- 50 ppm
2. By default, the FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL are full duplex
devices in preferred master mode
3. Automatic crossover detection is enabled. External crossover cable is not required
4. 10/100/1000 BASE-T operation requires the host system to have an SGMII interface with no
clocks, and the module PHY to be configured per Application Note AN-2036. With a SERDES that
does not support SGMII, the module will operate at 1000BASE-T only.
VI. Environmental Specifications
The FCLF8520P2BTL, FCLF8521P2BTL and FCLF8522P2BTL have an industrial temperature
ranges from -40°C to +85°C case temperature as specified in Table 8.
Table 7: Environment specifications
VII. Serial Communication Protocol
All Finisar SFPs support the 2-wire serial communication protocol outlined in the SFP MSA
1
.
These SFPs use an Atmel AT24C01A 128 byte E
2
PROM with an address of A0h. For details on
interfacing with the E
2
PROM, see the Atmel data sheet titled “AT24C01A/02/04/08/16 2-Wire
Serial CMOS E
2
PROM.”
4
The 1000BASE-T physical layer IC can also be accessed via the 2-wire serial bus at address ACh.
For details interfacing with the PHY IC, see Marvell data sheet titled “Alaska Ultra 88E1111
Integrated Gigabit Ethernet Transceiver”
5
(Marvell document number MV-S100649-00).
Table 8: Serial bus timing requirements
Finisar Corporation July 2015 Rev E Page 5
