IRFB5615PBF

IRFB5615PbF
4 www.irf.com
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Fig 9. Maximum Drain Current vs. Case Temperature
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
Fig 10. Threshold Voltage vs. Temperature
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
V
SD
, Source-to-Drain Voltage (V)
1.0
10
100
1000
I
S
D
,
R
e
v
e
r
s
e
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
T
J
= 25°C
T
J
= 175°C
V
GS
= 0V
25 50 75 100 125 150 175
T
C
, Case Temperature (°C)
0
5
10
15
20
25
30
35
40
I
D
,
D
r
a
i
n
C
u
r
r
e
n
t
(
A
)
-75 -50 -25 0 25 50 75 100 125 150 175
T
J
, Temperature ( °C )
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
V
G
S
(
t
h
)
,
G
a
t
e
t
h
r
e
s
h
o
l
d
V
o
l
t
a
g
e
(
V
)
I
D
= 100µA
I
D
= 250uA
ID = 1.0mA
ID = 1.0A
1E-006 1E-005 0.0001 0.001 0.01 0.1
t
1
, Rectangular Pulse Duration (sec)
0.001
0.01
0.1
1
10
T
h
e
r
m
a
l
R
e
s
p
o
n
s
e
(
Z
t
h
J
C
)
°
C
/
W
0.20
0.10
D = 0.50
0.02
0.01
0.05
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
τ
J
τ
J
τ
1
τ
1
τ
2
τ
2
τ
3
τ
3
R
1
R
1
R
2
R
2
R
3
R
3
Ci i/Ri
Ci= τi/Ri
τ
τ
C
τ
4
τ
4
R
4
R
4
Ri (°C/W) τi (sec)
0.02324 0.000008
0.26212 0.000106
0.50102 0.001115
0.25880 0.005407
1 10 100 1000
V
DS
, Drain-to-Source Voltage (V)
0.1
1
10
100
1000
I
D
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
C
u
r
r
e
n
t
(
A
)
OPERATION IN THIS AREA
LIMITED BY R
DS
(on)
Tc = 25°C
Tj = 175°C
Single Pulse
100µsec
1msec
10msec
DC
IRFB5615PbF
www.irf.com 5
Fig 13. Maximum Avalanche Energy Vs. Drain Current
Fig 12. On-Resistance Vs. Gate Voltage
Fig 14. Typical Avalanche Current Vs.Pulsewidth
Fig 15. Maximum Avalanche Energy Vs. Temperature
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T
jmax
. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long as neither
Tjmax nor Iav (max) is exceeded
3. Equation below based on circuit and waveforms shown in
Figures 17a, 17b.
4. P
D (ave)
= Average power dissipation per single
avalanche pulse.
5. B
V
= Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. I
av
= Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed
T
jmax
(assumed as 25°C in Figure 14, 15).
t
av =
Average time in avalanche.
D = Duty cycle in avalanche = t
av
·f
Z
thJC
(D, t
av
) = Transient thermal resistance, see figure 11)
P
D (ave)
= 1/2 ( 1.3·BV·I
av
) = DT/ Z
thJC
I
av
=
2DT/ [1.3·BV·Z
th
]
E
AS (AR)
= P
D (ave)
·t
av
4 6 8 10 12 14 16 18 20
V
GS,
Gate -to -Source Voltage (V)
0
0.05
0.1
0.15
0.2
0.25
0.3
0.35
0.4
R
D
S
(
o
n
)
,
D
r
a
i
n
-
t
o
-
S
o
u
r
c
e
O
n
R
e
s
i
s
t
a
n
c
e
(
)
I
D
= 21A
T
J
= 25°C
T
J
= 125°C
1.0E-06 1.0E-05 1.0E-04 1.0E-03 1.0E-02 1.0E-01
tav (sec)
0.1
1
10
100
A
v
a
l
a
n
c
h
e
C
u
r
r
e
n
t
(
A
)
0.05
Duty Cycle = Single Pulse
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.01
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
25 50 75 100 125 150 175
Starting T
J
, Junction Temperature (°C)
0
50
100
150
200
250
300
350
400
450
500
E
A
S
,
S
i
n
g
l
e
P
u
l
s
e
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
I
D
TOP 2.8A
5.3A
BOTTOM 21A
25 50 75 100 125 150 175
Starting T
J
, Junction Temperature (°C)
0
20
40
60
80
100
120
E
A
R
,
A
v
a
l
a
n
c
h
e
E
n
e
r
g
y
(
m
J
)
TOP Single Pulse
BOTTOM 1.0% Duty Cycle
I
D
= 21A
IRFB5615PbF
6 www.irf.com
Fig 18a. Switching Time Test Circuit
Fig 18b. Switching Time Waveforms
Fig 17b. Unclamped Inductive Waveforms
Fig 17a. Unclamped Inductive Test Circuit
t
p
V
(BR)DSS
I
AS
R
G
I
AS
0.01
t
p
D.U.T
L
V
DS
+
-
V
DD
DRIVER
A
15V
20V
Fig 19a. Gate Charge Test Circuit
Fig 19b. Gate Charge Waveform
Vds
Vgs
Id
Vgs(th)
Qgs1
Qgs2 Qgd Qgodr
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET
®
Power MOSFETs
D.U.T.
V
DS
I
D
I
G
3mA
V
GS
.3µF
50K
.2µF
12V
Current Regulator
Same Type as D.U.T.
Current Sampling Resistors
+
-
V
DS
90%
10%
V
GS
t
d(on)
t
r
t
d(off)
t
f
V
DS
Pulse Width 1 µs
Duty Factor 0.1 %
R
D
V
GS
R
G
D.U.T.
10V
+
-
V
DD
V
GS
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
+
-
+
+
+
-
-
-
R
G
V
DD
dv/dt controlled by R
G
Driver same type as D.U.T.
I
SD
controlled by Duty Factor "D"
D.U.T. - Device Under Test
D.U.T
P.W.
Period
di/dt
Diode Recovery
dv/dt
Ripple 5%
Body Diode Forward Drop
Re-Applied
Voltage
Reverse
Recovery
Current
Body Diode Forward
Current
V
GS
=10V
V
DD
I
SD
Driver Gate Drive
D.U.T. I
SD
Waveform
D.U.T. V
DS
Waveform
Inductor Curent
D =
P. W .
Period
* V
GS
= 5V for Logic Level Devices
*
Inductor Current

IRFB5615PBF

Mfr. #:
Manufacturer:
Infineon Technologies
Description:
MOSFET Audio MOSFT 150V 34A 41mOhm 26nC
Lifecycle:
New from this manufacturer.
Delivery:
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