Z90233, Z90234, and Z90231
eZVision 200 Television Controllers with OSD
PS010703-0502
7
*These pins are input on POR. They must be configured to be
output ports for PWM applications.
P27–P20 42, 41, 40, 39,
38, 37, 35, 21
28, 27, 26, 25,
24, 23, 21, 6
Bit-programmable
input/output ports
I/O I
HLFTN 21 6 Half tone output O I
SDATA0, 1 40, 42 26, 28 I
2
C data I/O I
SCLK0, 1 39, 41 25, 27 I
2
C clock I/O I
P63–P60 16, 12, 10, 9 1, 41, 38, 37 Bit-programmable
input/output ports
I/O I
P47–P40 20, 19, 18, 17,
15, 14, 11, 8
5, 4, 3, 2, 44, 43,
39, 36
Bit-programmable
input/output ports
I/O I
XTAL1 31 16 Crystal oscillator input I I
XTAL2 32 17 Crystal oscillator output O O
OSDX1 28 13 Dot clock oscillator
input
II
OSDX2 29 14 Dot clock oscillator
output
OO
HSYNC 26 11 Horizontal sync I I
VSYNC2712Vertical syncII
VBLANK 25 10 Video blank O O
R, G, B 24, 23, 22 9, 8, 7 Video R, G, B O O
ADC3–ADC0 9, 10, 11, 12 37, 38, 39, 41 4-bit analog-to-digital
converter input
AI I
RESET 33 19 Device reset I/O I
Table 6. Pin Descriptions for the Z90233, Z90234, and Z90231 (Continued)
Name
42-Pin SDIP
Pin Number
44-Pin PQFP
Pin Number Function Direction
Reset
State
Note:
