Philips Semiconductors Product specification
74F2834-bit binary full adder with fast carry
2
1989 Mar 03 853-0364 95944
FEATURES
• High speed 4-bit addition
• Cascadable in 4-bit increments
• Fast Internal carry look-ahead
DESCRIPTION
The 74F283 adds two 4-bit binary words (An plus Bn) plus the
incoming carry. The binary sum appears on the sum outputs
(Σ0–Σ3) and the outgoing carry (C
OUT
) according to the equation:
C
IN
+2
0
(A0+B0)+2
1
(A1+B1)+2
2
(A2+B2)+2
3
(A3+B3)
=Σ0+2Σ1+4Σ2+8Σ3+16C
OUT
where (+)=plus
Due to the symmetry of the binary add function, the 74F283 can be
used with either all active-High operands (positive logic) or with all
active-Low operands (negative logic). See Function Table. In case of
all active-Low operands (negative logic) the results Σ1–Σ4 and C
OUT
should be interpreted also as active-Low. With active-High inputs,
C
IN
cannot be left open; it must be held Low when no “carry in” is
intended. Interchanging inputs of equal weight does not affect the
operation, thus A0, B0, C
IN
can arbitrarily be assigned to pins 5, 6,
7, etc.
Due to pin limitations, the intermediate carries of the 74F283 are not
brought out for use as inputs or outputs. However, other means can
be used to effectively insert a carry into, or bring a carry out from, an
intermediate stage.
PIN CONFIGURATION
7
14
13
12
11
10
9
6
5
4
3
2
1
V
CC
B2
A3
B3
C
OUT
A0
B1
B0
Σ1
GND
A1
Σ0
SF00852
Σ3
Σ2
C
IN
A2
8
16
15
TYPE
TYPICAL
PROPAGATION
DELAY
TYPICAL
SUPPLY CURRENT
(TOTAL)
74F283 6.5ns 40mA
ORDERING INFORMATION
DESCRIPTION
COMMERCIAL RANGE
V
CC
= 5V ±10%,
T
amb
= 0°C to +70°C
PKG DWG #
16-pin plastic DIP N74F283N SOT38-4
16-pin plastic SO N74F283D SOT109-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
A0 - A3 A operand inputs 1.0/2.0 20µA/1.2mA
B0 - B3 B operand inputs 1.0/2.0 20µA/1.2mA
C
IN
Carry input 1.0/1.0 20µA/0.6mA
C
OUT
Carry output 50/33 1.0mA/20mA
Σ0–Σ3 Sum outputs 50/33 1.0mA/20mA
NOTE:
One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
LOGIC SYMBOL
5 6 3 2 14 15 12 11
41
Σ1Σ0
A0 B0 A1 B1 A2 B2 A3 B3
SF00853
13 10
Σ3Σ2
97
C
IN
C
OUT
V
CC
=Pin 16
GND=Pin 8
LOGIC SYMBOL (IEEE/IEC)
5
3
14
12
6
2
15
11
7
10
9
Σ
Σ
SF00854
13
1
4
COCI
0
3
0
3
P
Q
0
3
