N74F283D,623

Philips Semiconductors Product specification
74F2834-bit binary full adder with fast carry
1989 Mar 03
4
Figure A shows how to make a 3-bit adder. Tying the operand inputs
of the fourth adder (A3, B3) Low makes Σ3 dependent only on, and
equal to, the carry from the third adder. Using somewhat the same
principle, Figure B shows a way of dividing the 74F283 into a 2-bit
and a 1-bit adder. The third stage adder (A2, B2, Σ2) is used as
means of getting a carry (C10) signal into the fourth stage adder (via
A2 and B2) and bringing out the carry from the second stage on Σ2.
Note that as long as A2 and B2 are the same, whether High or Low,
they do not influence Σ2. Similarly, when A2 and B2 are the same,
the carry into the third stage does not influence the carry out of the
third stage. Figure C shows a method of implementing a 5-input
encoder where the inputs are equally weighted. The outputs Σ0, Σ1
and Σ2 present a binary number of inputs I0–I4 that are true.
Figure D shows one method of implementing a 5-input majority gate.
When three or more of the inputs I0–I4 are true, the output M4 is
true.
APPLICATIONS
Σ1Σ0
A0 B0 A1 B1 A2 B2 A3 B3
SF00856
Σ3Σ2
C
IN
C
OUT
L
C3
A. 3-bit Adder
Σ1Σ0
A0 B0 A1 B1 A2 B2 A3 B3
Σ3Σ2
C
IN
C
OUT
B. 2-bit and 1-bit Adder
C
IN
C
11
A0 B0 A1 B1
C10
A10 B10
Σ1Σ0 Σ10C2
Σ1Σ0
A0 B0 A1 B1 A2 B2 A3 B3
Σ3Σ2
C
IN
C
OUT
C. 5-input Encoder
Σ1Σ0
A0 B0 A1 B1 A2 B2 A3 B3
Σ3Σ2
C
IN
C
OUT
D. 5-input Majority Gate
I0 I1
I2
I3 I4
2
0
2
1
2
2
I0 I1
I2
I3 I4L
M4
Philips Semiconductors Product specification
74F2834-bit binary full adder with fast carry
1989 Mar 03
5
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free-air temperature range.)
SYMBOL PARAMETER RATING UNIT
V
CC
Supply voltage –0.5 to +7.0 V
V
IN
Input voltage –0.5 to +7.0 V
I
IN
Input current –30 to +5 mA
V
OUT
Voltage applied to output in High output state –0.5 to V
CC
V
I
OUT
Current applied to output in Low output state 40 mA
T
amb
Operating free-air temperature range 0 to +70 °C
T
stg
Storage temperature –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
SYMBOL
PARAMETER
LIMITS
UNIT
SYMBOL
PARAMETER
Min Nom Max
UNIT
V
CC
Supply voltage 4.5 5.0 5.5 V
V
IH
High-level input voltage 2.0 V
V
IL
Low-level input voltage 0.8 V
I
IK
Input clamp current –18 mA
I
OH
High-level output current –1
mA
I
OL
Low-level output current 20 mA
T
amb
Operating free-air temperature range 0 70 °C
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
NO TAG
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
NO
TAG
MIN
TYP
NO TAG
MAX
UNIT
V
O
High level out
p
ut voltage
V
CC
= MIN, V
IL
= MAX ±10%V
CC
2.5
V
V
OH
High
-
le
v
el
o
u
tp
u
t
v
oltage
V
IH
= MIN, I
OH
= MAX ±5%V
CC
2.7 3.4
V
V
O
Low level out
p
ut voltage
V
CC
= MIN, V
IL
= MAX ±10%V
CC
0.30 0.50
V
V
OL
Lo
w-
le
v
el
o
u
tp
u
t
v
oltage
V
IH
= MIN, I
OL
= MAX ±5%V
CC
0.30 0.50
V
V
IK
Input clamp voltage V
CC
= MIN, I
I
= I
IK
–0.73 –1.2 V
I
I
Input current at maximum input voltage V
CC
= MAX, V
I
= 7.0V 100 µA
I
IH
High-level input current V
CC
= MAX, V
I
= 2.7V 20 µA
I
Low level in
p
ut current
C
IN
only
V
CC
= MAX V =05V
–0.6 mA
I
IL
Lo
w-
le
v
el
inp
u
t
c
u
rrent
An, Bn
V
CC
=
MAX
,
V
I
=
0
.
5V
–1.2 mA
I
OS
Short-circuit output current
NO TAG
V
CC
= MAX –60 –150 mA
I
CC
Supply current (total)
4
V
CC
= MAX 40 55 mA
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
CC
= 5V, T
amb
= 25°C.
3. Not more than one output should be shorted at a time. For testing I
OS
, the use of high-speed test apparatus and/or sample-and-hold
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
OS
tests should be performed last.
4. I
CC
should be measured with all outputs open and the following conditions:
Condition1: all inputs grounded
Condition 2: all B inputs Low, other inputs at 4.5V
Condition 3: all inputs at 4.5V
Philips Semiconductors Product specification
74F2834-bit binary full adder with fast carry
1989 Mar 03
6
AC ELECTRICAL CHARACTERISTICS
LIMITS
TEST
T
amb
= +25°C
V =+5V
T
amb
= 0°C to +70°C
V =+5V± 10%
SYMBOL PARAMETER
TEST
CONDITIONS
V
CC
= +
5
.
V
C
L
= 50
p
F
,
V
CC
= +
5
.
V
±
10%
C
L
= 50
p
F
,
UNIT
CONDITIONS
C
L
=
50pF,
R
L
= 500
C
L
=
50pF,
R
L
= 500
MIN TYP MAX MIN MAX
t
PLH
t
PHL
Propagation delay
C
IN
to Σi
Waveform 1, 2
3.5
4.0
7.0
7.0
9.5
9.5
3.0
3.5
10.5
10.5
ns
ns
t
PLH
t
PHL
Propagation delay
Ai or Bi to Σi
Waveform 1, 2
3.5
3.5
7.0
7.0
9.5
9.5
2.5
3.5
10.5
10.5
ns
ns
t
PLH
t
PHL
Propagation delay
C
IN
to C
OUT
Waveform 2
3.5
3.0
5.7
5.4
7.5
7.0
3.5
2.5
8.5
8.0
ns
ns
t
PLH
t
PHL
Propagation delay
Ai or Bi to C
OUT
Waveform 1, 2
3.5
2.5
5.7
5.3
7.5
7.0
3.0
2.5
8.5
8.0
ns
ns
AC WAVEFORMS
For all waveforms, V
M
=1.5V.
V
M
V
M
V
M
V
M
Ai, Bi, C
IN
Σi, C
OUT
t
PLH
SF00857
t
PHL
Waveform 1. Propagation Delay
Operands and Carry Inputs to Outputs
V
M
V
M
V
M
V
M
t
PHL
t
PLH
SF00858
Ai, Bi, C
IN
Σi, C
OUT
Waveform 2. Propagation Delay
Operands and Carry Inputs to Outputs
TEST CIRCUIT AND WAVEFORM
t
w
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
90%
V
M
10%
NEGATIVE
PULSE
POSITIVE
PULSE
t
w
AMP (V)
0V
0V
t
THL
(
t
f
)
INPUT PULSE REQUIREMENTS
rep. rate
t
w
t
TLH
t
THL
1MHz 500ns
2.5ns 2.5ns
Input Pulse Definition
V
CC
family
74F
D.U.T.
PULSE
GENERATOR
R
L
C
L
R
T
V
IN
V
OUT
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
R
L
= Load resistor;
see AC ELECTRICAL CHARACTERISTICS for value.
C
L
= Load capacitance includes jig and probe capacitance;
see AC ELECTRICAL CHARACTERISTICS for value.
R
T
= Termination resistance should be equal to Z
OUT
of
pulse generators.
t
THL
(
t
f
)
t
TLH
(
t
r
)
t
TLH
(
t
r
)
AMP (V)
amplitude
3.0V 1.5V
V
M
SF00006

N74F283D,623

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Logic Adder & Subtractor 4-BIT ADDER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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