October 2005 13 MIC2198
MIC2198 Micrel, Inc.
PCB Layout and Checklist
PCB layout is critical to achieve reliable, stable and efficient
performance. A ground plane is required to control EMI and
minimize the inductance in power, signal and return paths.
The following guidelines should be followed to insure proper
operation of the circuit.
• Signal and power grounds should be kept separate
and connected at only one location. Large currents
or high di/dt signals that occur when the MOSFETs
turn on and off must be kept away from the small
signal connections.
• The connection between the current-sense resis-
tor and the MIC2198 current-sense inputs (pin 4
and 5) should have separate traces, through a
10Ω resistor on each pin. The traces should be
routed as closely as possible to each other and
their length should be minimized. Avoid running
the traces under the inductor and other switching
components. The 10Ω resistor should be placed
close as possible to pins 4 and 5 on the MIC2198
and a 1nF to 0.1µF capacitor placed between pins
4 and 5 will help attenuate switching noise on the
current sense traces. This capacitor should be
placed close to pins 4 and 5.
• When the high-side MOSFET is switched on, the
critical flow of current is from the input capacitor
through the MOSFET, inductor, sense resistor,
output capacitor, and back to the input capacitor.
These paths must be made with short, wide pieces
of trace. It is good practice to locate the ground
terminals of the input and output capacitors close
to each.
• When the low-side MOSFET is switched on, cur-
rent flows through the inductor, sense resistor,
output capacitor, and MOSFET. The source of the
low-side MOSFET should be located close to the
output capacitor.
• The freewheeling diode, D1 in Figure 2, conducts
current during the dead time, when both MOSFETs
are off. The anode of the diode should be located
close to the output capacitor ground terminal and
the cathode should be located close to the input
side of the inductor.
• The 4.7µF capacitor, which connects to the V
DD
terminal (pin 7) must be located right at the IC. The
V
DD
terminal is very noise sensitive and placement
of this capacitor is very critical. Connections must
be made with wide trace. The capacitor may be
located on the bottom layer of the board and con-
nected to the IC with multiple vias.
• The V
IN
bypass capacitor should be located close
to the IC and connected between pins 6 and 9.
Connections should be made with a ground and
power plane or with short, wide trace.
