MAX5171/MAX5173
Low-Power, Serial, 14-Bit DACs
with Force/Sense Voltage Output
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Note 1: INL guaranteed between codes 64 and 16383.
Note 2: Offset is measured at the code that comes closest to 10mV.
Note 3: Accuracy is better than 1.0 LSB for V
OUT
= 10mV to V
DD
- 180mV. Guaranteed by PSR test on end points.
Note 4: R
L
= open and digital inputs are either V
DD
or DGND.
Note 5: INL guaranteed between codes 128 and 16383.
ELECTRICAL CHARACTERISTICS—MAX5173 (continued)
(V
DD
= +2.7V to +3.6V, V
REF
= 1.25V, AGND = DGND, FB = OUT, R
L
= 5kΩ, C
L
= 100pF referenced to ground, T
A
= T
MIN
to T
MAX
,
unless otherwise noted. Typical values are at T
A
= +25°C).
µA110Shutdown Current (Note 4)
ns150t
CP
SCLK Clock Period
ns75t
CH
SCLK Pulse Width High
ns75
CONDITIONS
t
CL
SCLK Pulse Width Low
ns60t
CSS
CS Fall to SCLK Rise Setup
Time
ns0t
CSS
SCLK Rise to CS Rise Hold
Time
ns60t
DS
SDI Setup Time
ns0t
DH
SDI Hold Time
C
LOAD
= 200pF ns200t
DO1
SCLK Rise to DOUT Valid
Propagation Delay
ns75t
CS1
CS Rise to SCLK Rise Hold Time
C
LOAD
= 200pF ns200t
DO2
SCLK Fall to DOUT Valid
Propagation Delay
To ±0.5LSB, from 10mV to full-scale µs12Output Settling Time
ns10t
CS0
SCLK Rise to CS Fall Delay
ns150t
CSW
CS Pulse Width High
V/µs0.6SRVoltage Output Slew Rate
V0 V
DD
Output Voltage Swing (Note 3)
µA-0.1 0 0.1Current into FB
µs40Time Required to Exit Shutdown
UNITSMIN TYP MAXSYMBOLPARAMETER
CS = V
DD
, DIN = 50kHz; f
SCLK
= 100kHz,
V
SCLK
= 3Vp-p
nV-s1Digital Feedthrough
V2.7 3.6V
DD
Positive Supply Voltage
mA0.26 0.35I
DD
Power-Supply Current (Note 4)
DYNAMIC PERFORMANCE
POWER SUPPLIES
TIMING CHARACTERISTICS
