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74LV174N,112

P1-P3P4-P6P7-P9P10-P12P13-P14
Philips Semiconductors Product specification
74LV174
Hex D-type flip-flop with reset; positive edge-trigger
1998 May 20
4
FUNCTIONAL DIAGRAM
SV00350
3
4
67
5
2
11 10
13 12
14 15
1
9
D
0
D
1
D
2
D
3
D
4
D
5
CP
MR
Q
0
Q
1
Q
2
Q
3
Q
4
Q
5
FF1
to
FF6
FUNCTION TABLE
OPERATING MODES
INPUTS OUTPUTS
OPERATING
MODES
MR CP D
n
Q
0
Reset (clear) L X X L
Load ‘1’ H ↑ h H
Load ‘0’ H ↑ l L
H = HIGH voltage level
h = HIGH voltage level one set-up time prior to the
LOW-to-HIGH CP transition
L = LOW voltage level
l = LOW voltage level one set-up time prior to the
LOW-to-HIGH CP transition
q = Lower case letter indicates the state of referenced input
one set-up time prior to the LOW-to-HIGH CP transition
↑ = LOW–to–HIGH clock transition
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER CONDITIONS MIN TYP. MAX UNIT
V
CC
DC supply voltage See Note1 1.0 3.3 5.5 V
V
I
Input voltage 0 – V
CC
V
V
O
Output voltage 0 – V
CC
V
T
amb
Operating ambient temperature range in free
air
See DC and AC
characteristics
–40
–40
+85
+125
°C
t
r
, t
f
Input rise and fall times
V
CC
= 1.0V to 2.0V
V
CC
= 2.0V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V to 5.5V
–
–
–
–
–
–
–
500
200
100
50
ns/V
NOTES:
1. The LV is guaranteed to function down to V
CC
= 1.0V (input levels GND or V
CC
); DC characteristics are guaranteed from V
CC
= 1.2V to V
CC
= 5.5V.
Philips Semiconductors Product specification
74LV174
Hex D-type flip-flop with reset; positive edge-trigger
1998 May 20
5
ABSOLUTE MAXIMUM RATINGS
1,
2
In accordance with the Absolute Maximum Rating System (IEC 134)
Voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER CONDITIONS RATING UNIT
V
CC
DC supply voltage –0.5 to +7.0 V
±I
IK
DC input diode current V
I
< –0.5 or V
I
> V
CC
+ 0.5V 20 mA
±I
OK
DC output diode current V
O
< –0.5 or V
O
> V
CC
+ 0.5V 50 mA
±I
O
DC output source or sink current
– standard outputs
–0.5V < V
O
< V
CC
+ 0.5V 25 mA
±I
GND
,
±I
CC
DC V
CC
or GND current for types with
–standard outputs
50 mA
T
stg
Storage temperature range –65 to +150 °C
P
TOT
Power dissipation per package
–plastic DIL
–plastic mini-pack (SO)
–plastic shrink mini-pack (SSOP and TSSOP)
for temperature range: –40 to +125°C
above +70°C derate linearly with 12mW/K
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
750
500
400
mW
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
DC CHARACTERISTICS FOR THE LV FAMILY
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
-40°C to +85°C -40°C to +125°C
UNIT
MIN TYP
1
MAX MIN MAX
V
CC
= 1.2V 0.9 0.9
V
IH
HIGH level Input
V
CC
= 2.0V 1.4 1.4
V
V
IH
voltage
V
CC
= 2.7 to 3.6V 2.0 2.0
V
V
CC
= 4.5 to 5.5V 0.7*V
CC
0.7*V
CC
V
CC
= 1.2V 0.3 0.3
V
IL
LOW level Input
V
CC
= 2.0V 0.6 0.6
V
V
IL
voltage
V
CC
= 2.7 to 3.6V 0.8 0.8
V
V
CC
= 4.5 to 5.5 0.3*V
CC
0.3*V
CC
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
–I
O
= 100µA 1.2
HIGH level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
–I
O
= 100µA 1.8 2.0 1.8
HIGH
l
eve
l
ou
t
pu
t
voltage
;
all out
p
uts
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
–I
O
= 100µA 2.5 2.7 2.5
V
V
voltage
all
out uts
V
CC
= 3.0V; V
I
= V
IH
or V
IL;
–I
O
= 100µA 2.8 3.0 2.8
V
OH
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
–I
O
= 100µA 4.3 4.5 4.3
HIGH level output
voltage;
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
–I
O
= 6mA 2.40 2.82 2.20
V
g
STANDARD
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
–I
O
= 12mA 3.60 4.20 3.50
V
V
CC
= 1.2V; V
I
= V
IH
or V
IL;
I
O
= 100µA 0
LOW level output
V
CC
= 2.0V; V
I
= V
IH
or V
IL;
I
O
= 100µA 0 0.2 0.2
LOW
l
eve
l
ou
t
pu
t
voltage
;
all out
p
uts
V
CC
= 2.7V; V
I
= V
IH
or V
IL;
I
O
= 100µA 0 0.2 0.2
V
V
voltage
all
out uts
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 100µA 0 0.2 0.2
V
OL
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 100µA 0 0.2 0.2
LOW level output
voltage;
V
CC
= 3.0V;V
I
= V
IH
or V
IL;
I
O
= 6mA 0.25 0.40 0.50
V
g
STANDARD
outputs
V
CC
= 4.5V;V
I
= V
IH
or V
IL;
I
O
= 12mA 0.35 0.55 0.65
V
Philips Semiconductors Product specification
74LV174
Hex D-type flip-flop with reset; positive edge-trigger
1998 May 20
6
DC CHARACTERISTICS FOR THE LV FAMILY (Continued)
Over recommended operating conditions voltages are referenced to GND (ground = 0V)
SYMBOL
PARAMETER
TEST CONDITIONS
LIMITS
UNIT
SYMBOL
PARAMETER
TEST
CONDITIONS
-40°C to +85°C -40°C to +125°C
UNIT
I
I
Input leakage
current
V
CC
= 5.5V; V
I
= V
CC
or GND 1.0 1.0 µA
I
CC
Quiescent supply
current; MSI
V
CC
= 5.5V; V
I
= V
CC
or GND; I
O
= 0 20.0 160 µA
∆I
CC
Additional
quiescent supply
current per input
V
CC
= 2.7V to 3.6V; V
I
= V
CC
–0.6V 500 850 µA
NOTE:
1. All typical values are measured at T
amb
= 25°C.
AC CHARACTERISTICS
GND = 0V; t
r
= t
f
= 2.5ns; C
L
= 50pF; R
L
= 1KΩ
SYMBOL
PARAMETER WAVEFORM
CONDITION
LIMITS
–40 to +85 °C
LIMITS
–40 to +125 °C
UNIT
V
CC
(V) MIN TYP
1
MAX MIN MAX
1.2 – 100 – – –
Propagation delay
2.0 – 34 43 – 53
t
PHL/
t
PLH
P
ropaga
ti
on
d
e
l
ay
CP to Q
n
Figure 1
2.7 – 25 31 – 39
ns
CP
to
Q
n
3.0 to 3.6 – 19
2
25 – 31
4.5 to 5.5 – 13
3
21 – 26
1.2 – 80 – – –
Propagation delay
2.0 – 27 43 – 53
t
PHL
P
ropaga
ti
on
d
e
l
ay
MR to Q
n
Figure 2
2.7 – 20 31 – 39
ns
MR
to
Q
n
3.0 to 3.6 – 15
2
25 – 31
4.5 to 5.5 – 11
3
21 – 26
2.0 34 10 – 41 –
t
W
Clock pulse width
Figure 1
2.7 25 8 – 30 –
t
W
HIGH to LOW
Figure
1
3.0 to 3.6 20 6
2
– 24 –
4.5 to 5.5 13 4
3
16
2.0 34 9 – 41 –
t
W
Master reset pulse
Figure 2
2.7 25 6 – 30 –
t
W
width LOW
Figure
2
3.0 to 3.6 20 5 – 24 –
4.5 to 5.5 13 4
2
16
1.2 – –20 – – –
Removal time
2.0 5 –7 – 5 –
t
rem
R
emova
l
ti
me
MR to CP
Figure 2
2.7 5 –5 – 5 –
ns
MR
to
CP
3.0 to 3.6 5 –4
2
– 5 –
4.5 to 5.5 5 –3
3
5
1.2 – 10 – – –
Set up time
2.0 22 4 – 26 –
t
su
S
e
t
-up
ti
me
D
n
to CP
Figure 3
2.7 16 3 – 19 –
ns
D
n
to
CP
3.0 to 3.6 13 2
2
– 15 –
4.5 to 5.5 9 1
3
10
P1-P3P4-P6P7-P9P10-P12P13-P14

74LV174N,112

Mfr. #:
Buy 74LV174N,112
Manufacturer:
NXP Semiconductors
Description:
Flip Flops HEX D-TYPE MASTER
Lifecycle:
New from this manufacturer.
Delivery:
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