Data Sheet AD7796/AD7797
Rev. B | Page 19 of 24
Continuous Read Mode
Rather than write to the communication register each time a
conversion is complete to access the data, the AD7796/AD7797
can be configured to automatically place the conversions on the
DOUT/
RDY
line. By writing 01011100 to the communication
register, the user need only apply the appropriate number of
SCLK cycles to the ADC. The 16-/24-bit word is automatically
placed on the DOUT/
RDY
line when a conversion is complete.
The ADC should be configured for continuous conversion mode.
When DOUT/
RDY
goes low to indicate the end of a conversion,
sufficient SCLK cycles must be applied to the ADC. The data
conversion is placed on the DOUT/
RDY
line. When the conver-
sion is read, DOUT/
RDY
returns high until the next conversion
is available. In this mode, the data can be read only once.
The user must also ensure that the data-word is read before the
next conversion is complete. If the user has not read the conversion
before the completion of the next conversion, or if insufficient
serial clocks are applied to the AD7796/AD7797 to read the word,
the serial output register is reset when the next conversion is
complete. The new conversion is placed in the output serial
register.
To exit continuous read mode, the instruction 01011000 must
be written to the communication register while the DOUT/
RDY
pin is low. While in continuous read mode, the ADC monitors
activity on the DIN line to receive the instruction to exit the
continuous read mode. Additionally, a reset occurs if 32
consecutive 1s are seen on DIN. Therefore, DIN should be
held low in continuous read mode until an instruction is
written to the device.
DI
N
SCLK
DO
UT/
RDY
CS
0x5C
DA
TA DATA DA
TA
06083-016
Figure 16. Continuous Read
AD7796/AD7797 Data Sheet
Rev. B | Page 20 of 24
CIRCUIT DESCRIPTION
ANALOG INPUT CHANNEL
The AD7796/AD7797 have one differential analog input
channel. The input channel feeds into a high impedance input
stage of the amplifier. Therefore, the input can tolerate signifi-
cant source impedances and is tailored for direct connection to
external resistive-type sensors such as strain gages.
The absolute input voltage range is restricted to a range between
GND + 300 mV and AV
DD
− 1.1 V. Care must be taken in setting
up the common-mode voltage to avoid exceeding these limits.
Otherwise, there is degradation in linearity and noise
performance.
This low noise in-amp means that signals of small amplitude
can be gained within the AD7796/AD7797 while still maintain-
ing excellent noise performance. The amplifier is configured to
have a gain of 128. Therefore, with an external 2.5 V reference,
the unipolar range is 0 mV to 20 mV while the bipolar range is
±20 mV. The common-mode voltage ((AIN(+) + AIN())/2
must be 0.5 V.
BIPOLAR/UNIPOLAR CONFIGURATION
The analog input to the AD7796/AD7797 can accept either
unipolar or bipolar input voltage ranges. A bipolar input range
does not imply that the device can tolerate negative voltages
with respect to system GND. Unipolar and bipolar signals on
the AIN(+) input are referenced to the voltage on the AIN()
input. For example, if AIN(−) is 2.5 V and the ADC is
configured for unipolar mode, the input voltage range on the
AIN(+) pin is 2.5 V to 2.02 V.
If the ADC is configured for bipolar mode, the analog input
range on the AIN(+) input is 2.48 V to 2.52 V. The bipolar/
unipolar option is chosen by programming the U/
B
bit in the
configuration register.
DATA OUTPUT CODING
When the ADC is configured for unipolar operation, the output
code is natural (straight) binary with a zero differential input
voltage resulting in a code of 00...00, a midscale voltage resulting in
a code of 100...000, and a full-scale input voltage resulting in a
code of 111...111. The output code for any analog input voltage
can be represented as
Code = (2
N
× AIN × 128)/V
REF
When the ADC is configured for bipolar operation, the output
code is offset binary with a negative full-scale voltage resulting
in a code of 000...000, a zero differential input voltage resulting
in a code of 100...000, and a positive full-scale input voltage
resulting in a code of 111...111. The output code for any analog
input voltage can be represented as
Code = 2
N – 1
× [(AIN × 128 /V
REF
) + 1]
where:
AIN is the analog input voltage
N = 16/24 for the AD7796/AD7797.
REFERENCE
The AD7796/AD7797 have a fully differential input capability
for the channel. The common-mode range for these differential
inputs is GND to AV
DD
. The reference input is unbuffered;
therefore, excessive R-C source impedances introduce gain
errors. The reference voltage REFIN (REFIN(+) − REFIN(−)) is
2.5 V nominal, but the AD7796/AD7797 are functional with
reference voltages 0.1 V to AV
DD
. In applications where the
excitation (voltage or current) for the transducer on the analog
input also drives the reference voltage for the device, the effect
of the low frequency noise in the excitation source is removed
because the application is ratiometric. If the AD7796/AD7797
are used in a nonratiometric application, a low noise reference
should be used.
Recommended 2.5 V reference voltage sources for the AD7796/
AD7797 include the ADR381 and ADR391, which are low noise,
low power references. Also note that the reference inputs provide
a high impedance, dynamic load. Because the input impedance
of each reference input is dynamic, resistor/ capacitor combinations
on these inputs can cause dc gain errors, depending on the
output impedance of the source that is driving the reference
inputs.
Reference voltage sources such as those recommended above
(the ADR391, for example) typically have low output impedances
and are, therefore, tolerant to decoupling capacitors on REFIN(+)
without introducing gain errors in the system. Deriving the
reference input voltage across an external resistor means that
the reference input sees a significant external source impedance.
External decoupling on the REFIN pins is not recommended in
this type of circuit configuration.
Data Sheet AD7796/AD7797
Rev. B | Page 21 of 24
RESET
The circuitry and serial interface of the AD7796/AD7797 can
be reset by writing 32 consecutive 1s to the device. This resets
the logic, the digital filter, and the analog modulator, while all
on-chip registers are reset to their default values. A reset is
automatically performed on power-up. When a reset is initiated,
the user must allow a period of 500 µs before accessing any of
the on-chip registers. A reset is useful if the serial interface
becomes asynchronous because of noise on the SCLK line.
BURNOUT CURRENTS
The AD7796/AD7797 contain two 100 nA constant current
generators, one sourcing current from AV
DD
to AIN(+) and one
sinking current from AIN() to GND. Both currents are either
on or off, depending on the burnout current enable (BO) bit in
the configuration register. These currents can be used to verify
that an external transducer is still operational before attempting
to take measurements. When the burnout currents are turned
on, they flow in the external transducer circuit, and a measure-
ment of the input voltage on the analog input channel can be
taken. If the resulting voltage is full scale, the user needs to
verify why this is the case. A full-scale reading could mean that
the front-end sensor is open circuit. It could also mean that the
front-end sensor is overloaded and is justified in outputting full
scale, or that the reference could be absent, thus clamping the
data to all 1s.
When reading all 1s from the output, the user needs to check
these three cases before making a judgment. If the voltage
measured is 0 V, it could indicate that the transducer has short
circuited. For normal operation, these burnout currents are
turned off by writing a 0 to the BO bit in the configuration
register.
AV
DD
MONITOR
Along with converting external voltages, the ADC can be used
to monitor the voltage on the AV
DD
pin. When Bit CH2 to
Bit CH0 equal 1, the voltage on the AV
DD
pin is internally
attenuated by 6. The resulting voltage is applied to the Σ-
modulator using an internal 1.17 V reference for analog-to-
digital conversion. This is useful because variations in the
power supply voltage can be monitored.
TEMPERATURE MONITOR
The AD7796/AD7797 have an embedded temperature sensor
that is accessed when Bit CH2 to Bit CH0 are equal to 1, 1, 0,
respectively. When the internal temperature sensor is selected,
the AD7796/AD7797 use an internal 1.17 V reference for
the conversions. The temperature sensor has a sensitivity of
0.81 mV/°C. However, a two-point calibration is required to
optimize the accuracy. The temperature sensor is not factory
calibrated; a user calibration is required. Following a
calibration, the accuracy is 2°C.
CALIBRATION
The AD7796/AD7797 provide three calibration modes that can
be programmed via the mode bits in the mode register. These
are internal zero-scale calibration, system zero-scale calibration,
and system full-scale calibration, which effectively reduces the
offset error and full-scale error to the order of the noise. After
each conversion, the ADC conversion result is scaled using the
ADC calibration registers before being written to the data register.
The offset calibration coefficient is subtracted from the result
prior to multiplication by the full-scale coefficient.
To start a calibration, write the relevant value to the MD2 to
MD0 bits in the mode register. DOUT/
RDY
goes high when the
calibration is initiated. After the calibration is complete, the
contents of the corresponding calibration registers are updated,
the
RDY
bit in the status register is set, the DOUT/
RDY
pin goes
low (if
CS
is low), and the AD7796/AD7797 revert to idle mode.
During an internal zero-scale calibration, the zero input is
automatically connected internally to the ADC input pins. A
system calibration, however, expects the system zero-scale and
system full-scale voltages to be applied to the ADC pins before
the calibration mode is initiated. In this way, external ADC
errors are removed.
From an operational point of view, a calibration should be
treated like another ADC conversion. A zero-scale calibration
(if required) should always be performed before a full-scale
calibration. System software should monitor the
RDY
bit in the
status register or the DOUT/
RDY
pin to determine the end of
calibration via a polling sequence or an interrupt-driven routine.
Both an internal offset calibration and system offset calibration
takes two conversion cycles. An internal offset calibration is not
needed because the ADC itself removes the offset continuously.
A system full-scale calibration takes two conversion cycles to
complete. The measured full-scale coefficient is placed in the
full-scale register. If system offset calibrations are being performed
along with system full-scale calibrations, the offset calibration
should be performed before the system full-scale calibration is
initiated.

EVAL-AD7797EBZ

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Manufacturer:
Analog Devices Inc.
Description:
AD7797 ADC Evaluation Board LabVIEW BASED Software
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