
Approval sheet
Page 5 of 6 ASC_WA04P_V14 Feb. 2012
TEST AND REQUIREMENTS (JIS C 5201-1 : 1998)
TEST PROCEDURE REQUIREMENT
Characteristic
Impedance
Measuring circuit
50Ω
Insulation
resistance
Clause 4.6
Apply the 50VDC for 1minute
At least 100MΩ
Solderability
Clause 4.17
Un-mounted chips completely immersed for 2±0.5 second in a SAC
solder bath at 235℃±5℃
good tinning (>95% covered)
no visible damage
Resistance to
soldering
heat(R.S.H)
Clause 4.18
Un-mounted chips completely immersed for 10±1 second in a SAC
solder bath at 260℃±5ºC
no visible damage
Attenuation 0.5~ 2dB : within
±0.1dB
Attenuation 3~ 5dB : within
±0.2dB
Attenuation 6~ 20dB : within
±0.3dB
Temperature
cycling
Clause 4.19
30 minutes at -55°C±3°C, 2~3 minutes at 20°C+5°C-1°C, 30
minutes at +125°C±3°C, 2~3 minutes at 20°C+5°C-1°C, total
5 continuous cycles
no visible damage
Attenuation 0.5~ 2dB : within
±0.1dB
Attenuation 3~ 5dB : within
±0.2dB
Attenuation 6~ 20dB : within
±0.3dB
Load life
(endurance)
Clause 4.25
1000 +48/-0 hours, loaded with RCWV or Vmax in chamber
controller 85±2ºC, 1.5 hours on and 0.5 hours off
no visible damage
Attenuation 0.5~ 2dB : within
±0.1dB
Attenuation 3~ 5dB : within
±0.2dB
Attenuation 6~ 20dB : within
±0.3dB
Voltage
Clause 4.7
Apply the maximum overload voltage (AC) for 1 minute No breakdown or flashover