Philips Semiconductors Product specification
N-channel TrenchMOS transistor PHX23NQ10T
AVALANCHE ENERGY LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
E
AS
Non-repetitive avalanche Unclamped inductive load, I
AS
= 14 A; - 93 mJ
energy t
p
= 100 µs; T
j
prior to avalanche = 25˚C;
V
DD
≤ 25 V; R
GS
= 50 Ω; V
GS
= 10 V; refer
to fig:15
I
AS
Peak non-repetitive - 23 A
avalanche current
THERMAL RESISTANCES
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
R
th j-mb
Thermal resistance junction - - 4.6 K/W
to mounting base
R
th j-a
Thermal resistance junction SOT186a package, in free air - 55 - K/W
to ambient
ELECTRICAL CHARACTERISTICS
T
j
= 25˚C unless otherwise specified
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
V
(BR)DSS
Drain-source breakdown V
GS
= 0 V; I
D
= 0.25 mA; 100 - - V
voltage T
j
= -55˚C 89 - - V
V
GS(TO)
Gate threshold voltage V
DS
= V
GS
; I
D
= 1 mA 2 3 4 V
T
j
= 150˚C 1.25 - - V
T
j
= -55˚C - - 6 V
R
DS(ON)
Drain-source on-state V
GS
= 10 V; I
D
= 13 A - 49 70 mΩ
resistance T
j
= 150˚C - 115 163 mΩ
I
GSS
Gate source leakage current V
GS
= ± 10 V; V
DS
= 0 V - 10 100 nA
I
DSS
Zero gate voltage drain V
DS
= 100 V; V
GS
= 0 V - 0.05 10 µA
current T
j
= 150˚C - - 500 µA
Q
g(tot)
Total gate charge I
D
= 23 A; V
DD
= 80 V; V
GS
= 10 V - 22 - nC
Q
gs
Gate-source charge - 5 - nC
Q
gd
Gate-drain (Miller) charge - 10 - nC
t
d on
Turn-on delay time V
DD
= 50 V; R
D
= 2.2 Ω;-8-ns
t
r
Turn-on rise time V
GS
= 10 V; R
G
= 5.6 Ω -39-ns
t
d off
Turn-off delay time Resistive load - 26 - ns
t
f
Turn-off fall time - 24 - ns
L
d
Internal drain inductance Measured from drain lead to centre of die - 4.5 - nH
L
s
Internal source inductance Measured from source lead to source - 7.5 - nH
bond pad
C
iss
Input capacitance V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz - 890 1187 pF
C
oss
Output capacitance - 139 167 pF
C
rss
Feedback capacitance - 83 109 pF
September 1999 2 Rev 1.000
