Si554
Rev. 1.1 7
Table 7. CLK± Output Phase Noise (Typical)
Offset Frequency 74.25 MHz
90 ppm/V
LVPECL
491.52 MHz
45 ppm/V
LVPECL
622.08 MHz
135 ppm/V
LVPECL
Units
100 Hz
1kHz
10 kHz
100 kHz
1MHz
10 MHz
100 MHz
–87
–114
–132
–142
–148
–150
n/a
–75
–100
–116
–124
–135
–146
–147
–65
–90
–109
–121
–134
–146
–147
dBc/Hz
Table 8. Environmental Compliance
The Si554 meets the following qualification test requirements.
Parameter Conditions/Test Method
Mechanical Shock
MIL-STD-883F, Method 2002.3 B
Mechanical Vibration
MIL-STD-883F, Method 2007.3 A
Solderability
MIL-STD-883F, Method 203.8
Gross & Fine Leak
MIL-STD-883F, Method 1014.7
Resistance to Solvents
MIL-STD-883F, Method 2016
Moisture Sensitivity Level J-STD-020, MSL 1
Contact Pads J-STD-020, MSL 1
Table 9. Thermal Characteristics
(Typical values TA = 25 ºC, V
DD
=3.3V)
Parameter Symbol Test Condition Min Typ Max Unit
Thermal Resistance Junction to Ambient
JA
Still Air 84.6 °C/W
Thermal Resistance Junction to Case
JC
Still Air 38.8 °C/W
Ambient Temperature T
A
–40 85 °C
Junction Temperature T
J
——125°C
Si554
8 Rev. 1.1
Table 10. Absolute Maximum Ratings
1
Parameter Symbol Rating Units
Maximum Operating Temperature
T
AMAX
85 ºC
Supply Voltage, 1.8 V Option
V
DD
–0.5 to +1.9 V
Supply Voltage, 2.5/3.3 V Option
V
DD
–0.5 to +3.8 V
Input Voltage (any input pin)
V
I
–0.5 to V
DD
+ 0.3 V
Storage Temperature
T
S
–55 to +125 ºC
ESD Sensitivity (HBM, per JESD22-A114)
ESD 2000 V
Soldering Temperature (Pb-free profile)
2
T
PEAK
260 ºC
Soldering Temperature Time @ T
PEAK
(Pb-free profile)
2
t
P
20–40 seconds
Notes:
1. Stresses beyond those listed in Absolute Maximum Ratings may cause permanent damage to the device. Functional
operation or specification compliance is not implied at these conditions. Exposure to maximum rating conditions for
extended periods may affect device reliability.
2. The device is compliant with JEDEC J-STD-020C. Refer to Si5xx Packaging FAQ available for download from
www.silabs.com/VCXO for further information, including soldering profiles.
Si554
Rev. 1.1 9
2. Pin Descriptions
Table 11. Si554 Pin Descriptions
Pin Name Type Function
1 V
C
Analog Input
Control Voltage
2 OE* Input
Output Enable (Polarity = High):
0 = clock output disabled (outputs tri-stated)
1 = clock output enabled
3 GND Ground
Electrical and Case Ground
4 CLK+ Output
Oscillator Output
5
CLK–
(N/A for CMOS)
Output
Complementary Output
(N/C for CMOS)
6 V
DD
Power
Power Supply Voltage
7 FS[1]* Input
Frequency Select MSB
8 FS[0]* Input
Frequency Select LSB
*Note: FS[1:0] and OE include a 17 k pullup resistor to V
DD
. Output Enable polarity selectable at time of order. See Section
3. "Ordering Information" on page 10 for details on frequency select and OE polarity ordering options.
(Top View)
1
2
3
6
5
4
V
C
GND
OE
V
DD
CLK+
CLK–
FS[1]
FS[0]
8
7

554BC000520DG

Mfr. #:
Manufacturer:
Silicon Labs
Description:
XTAL OSC VCXO 3.3V 8SMD
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union