MIC7300 Micrel
MIC7300 8 June 2005
Application Information
Input Common-Mode Voltage
The MIC7300 tolerates input overdrive by at least 300mV
beyond either rail without producing phase inversion.
If the absolute maximum input voltage is exceeded, the input
current should be limited to ±5mA maximum to prevent
reducing reliability. A 10kΩ series input resistor, used as a
current limiter, will protect the input structure from voltages as
large as 50V above the supply or below ground. See Figure
1.
V
IN
V
OUT
10kΩ
R
IN
Figure 1. Input Current-Limit Protection
Output Voltage Swing
Sink and source output resistances of the MIC7300 are
equal. Maximum output voltage swing is determined by the
load and the approximate output resistance. The output
resistance is:
R
V
I
OUT
DROP
LOAD
=
V
DROP
is the voltage dropped within the amplifier output
stage. V
DROP
and I
LOAD
can be determined from the V
O
(output swing) portion of the appropriate Electrical Character-
istics table. I
LOAD
is equal to the typical output high voltage
minus V+/2 and divided by R
LOAD
. For example, using the
Electrical Characteristics DC (5V) table, the typical output
high voltage using a 2kΩ load (connected to V+/2) is 4.985V,
which produces an I
LOAD
of:
4.985V 2.5V
2k
1.243mA
−
Ω
=
.
Voltage drop in the amplifier output stage is:
V
DROP
= 5.0V – 4.985V
V
DROP
= 0.015V
Because of output stage symmetry, the corresponding typical
output low voltage (0.015V) also equals V
DROP
. Then:
R
0.015V
0.001243A
1
OUT
==2Ω
Power Dissipation
The MIC7300 output drive capability requires considering
power dissipation. If the load impedance is low, it is possible
to damage the device by exceeding the 125°C junction
temperature rating.
On-chip power consists of two components: supply power
and output stage power. Supply power (P
S
) is the product of
the supply voltage (V
S
= V
V+
– V
V–
) and supply current (I
S
).
Output stage power (P
O
) is the product of the output stage
voltage drop (V
DROP
) and the output (load) current (I
OUT
).
Total on-chip power dissipation is:
P
D
= P
S
+ P
O
P
D
= V
S
I
S
+ V
DROP
I
OUT
where:
P
D
= total on-chip power
P
S
= supply power dissipation
P
O
= output power dissipation
V
S
= V
V+
– V
V–
I
S
= power supply current
V
DROP
= V
V+
– V
OUT
(sourcing current)
V
DROP
= V
OUT
– V
V–
(sinking current)
The above addresses only steady state (dc) conditions. For
non-dc conditions the user must estimate power dissipation
based on rms value of the signal.
The task is one of determining the allowable on-chip power
dissipation for operation at a given ambient temperature and
power supply voltage. From this determination, one may
calculate the maximum allowable power dissipation and,
after subtracting P
S
, determine the maximum allowable load
current, which in turn can be used to determine the miniumum
load impedance that may safely be driven. The calculation is
summarized below.
P
TT
D(max)
J(max) A
JA
=
−
θ
θ
JA(SOT-23-5)
= 260°C/W
θ
JA(MSOP-8)
= 85°C/W
Driving Capacitive Loads
Driving a capacitive load introduces phase-lag into the output
signal, and this in turn reduces op-amp system phase margin.
The application that is least forgiving of reduced phase
margin is a unity gain amplifier. The MIC7300 can typically
drive a 2500pF capacitive load connected directly to the
output when configured as a unity-gain amplifier and pow-
ered with a 2.2V supply. At 10V operation the circuit typically
drives 6000pF. Phase margin is typically 40°.
Using Large-Value Feedback Resistors
A large-value feedback resistor (> 500kΩ) can reduce the
phase margin of a system. This occurs when the feedback
resistor acts in conjunction with input capacitance to create
phase lag in the feedback signal. Input capacitance is usually
a combination of input circuit components and other parasitic
capacitance, such as amplifier input capacitance and stray
printed circuit board capacitance.
Figure 2 illustrates a method of compensating phase lag
caused by using a large-value feedback resistor. Feedback
capacitor C
FB
introduces sufficient phase lead to overcome
