The HLD (HOLD_N) pin can be used to interrupt a serial operation without aborting it. The WP
(WP_N) pin ensures hardware write protect feature if the write protect enable bit in the Status
Register is set to ’1’. The SPI protocol includes a chip select (to permit multiple devices on the
bus), an opcode, and a three-byte address. There are nine opcodes, that can be issued by the bus
master to the CY15B104Q. These opcodes specify the commands from the bus master to the
slave device. After the CS (CS_N) is activated, the first byte transferred from the bus master is
the opcode. Following the opcode, any addresses and data are then transferred. The CS (CS_N)
must go inactive after an operation is complete and before a new opcode can be issued.
click boards are plug and play!
Up to now, MikroElektronika has released hundreds of click boards™. We are releasing new
ones every week. It is our intention to provide you with as many add-on boards as possible, so
you will be able to expand your development board with additional functionality.
Pull-up resistors are included on the FRAM 2 click and it's ready to be used immediately after
plugging into the mikroBUS™ socket on one of our development boards.
Ferroelectric RAM
Ferroelectric RAM, better known as FRAM is a random-access memory. It's famous for fast
access times and low power consumption. Also, since it's a non-volatile type of memory, data is
retained upon power down.
This type of memory is used in many industries today, but most commonly in small hand-held
devices, since it has low power consumption, like mobile phones, electronic meters, medical
applications, etc.
Specifications
Type FRAM
Applications Suitable for low-power applications
On-board
modules
CY15B104Q - a 4-Mbit non-volatile memory employing an advanced
ferroelectric process
Key Features
4-Mbit ferroelectric random access memory (F-RAM) logically
organized as 512 K × 8, high-endurance 100 trillion (10^14)