74ABT273AD,118

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74ABT273A
Octal D-type flip-flop
Product specification 1995 Sep 06
INTEGRATED CIRCUITS
IC23 Data Handbook
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
2
1995 Sep 06 853-1774 15704
FEATURES
Eight edge-triggered D-type flip-flops
Buffered common clock
Buffered asynchronous Master Reset
Power-up reset
See 74ABT377 for clock enable version
See 74ABT373 for transparent latch version
See 74ABT374 for 3-State version
ESD protection exceeds 2000 V per Mil Std 833 Method 3015 and
200 V per machine model.
DESCRIPTION
The 74ABT273A has eight edge-triggered D-type flip-flops with
individual D inputs and Q outputs. The common buffered Clock (CP)
and Master Reset (MR
) inputs load and reset (clear) all flip-flops
simultaneously.
The register is fully edge-triggered. The state of each D input, one
setup time before the Low-to-High clock transition, is transferred to
the corresponding flip-flop’s Q output.
All outputs will be forced Low independent of Clock or Data inputs
by a Low voltage level on the MR
input. The device is useful for
applications where the true output only is required and the CP and
MR
are common elements.
QUICK REFERENCE DATA
SYMBOL PARAMETER
CONDITIONS
T
amb
= 25°C; GND = 0V
TYPICAL UNIT
t
PLH
t
PHL
Propagation delay
CP to Qn
C
L
= 50pF; V
CC
= 5V
3.0
3.4
ns
C
IN
Input capacitance V
I
= 0V or V
CC
3.5 pF
I
CCH
Total supply current Outputs High; V
CC
=5.5V 150 µA
ORDERING INFORMATION
PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER
20-Pin Plastic DIP –40°C to +85°C 74ABT273A N 74ABT273A N SOT146-1
20-Pin plastic SO –40°C to +85°C 74ABT273A D 74ABT273A D SOT163-1
20-Pin Plastic SSOP Type II –40°C to +85°C 74ABT273A DB 74ABT273A DB SOT339-1
20-Pin Plastic TSSOP Type I –40°C to +85°C 74ABT273A PW 7ABT273APW DH SOT360-1
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10 11
12
13
14
15
16
17
18
19
20
MR
Q0
D0
D1
Q1
Q2
D2
D3
Q3 Q4
GND
D4
D5
Q5
Q6
D6
D7
Q7
V
CC
CP
SA00052
PIN DESCRIPTION
PIN
NUMBER
SYMBOL NAME AND FUNCTION
11 CP Clock pulse input (active rising edge)
3, 4, 7, 8, 13,
14, 17, 18
D0 - D7 Data inputs
2, 5, 6, 9, 12,
15, 16, 19
Q0 - Q7 Data outputs
1 MR Master Reset input (active-Low)
10 GND Ground (0V)
20 V
CC
Positive supply voltage
Philips Semiconductors Product specification
74ABT273AOctal D-type flip-flop
1995 Sep 06
3
LOGIC SYMBOL (IEEE/IEC)
11
32
45
76
89
C1
13 12
14 15
17 16
18 19
1
R
1D
SA00054
LOGIC SYMBOL
3 4 7 8 13 14 1817
D0 D1 D2 D3 D4 D5 D6 D7
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
2 5 6 9 12 15 16 19
1
11
MR
CP
SA00053
LOGIC DIAGRAM
CP
Q
R
D
D
3
D0
Q0
CP
Q
R
D
D
4
D1
CP
Q
R
D
D
7
D2
CP
Q
R
D
D
8
D3
CP
Q
R
D
D
13
D4
CP
Q
R
D
D
14
D5
CP
Q
R
D
D
17
D6
CP
Q
R
D
D
18
D7
2
Q1
5
Q2
6
Q3
9
Q4
12
Q5
15
Q6
16
Q7
19
11
1
CP
MR
SA00055
FUNCTION TABLE
INPUTS OUTPUTS
OPERATING MODE
MR CP Dn Q0 - Q7
OPERATING
MODE
L X X L Reset (clear)
H h H Load ”1”
H l L Load ”0”
H = High voltage level
h = High voltage level one set-up time prior to the Low-to-High
clock transition
L = Low voltage level
l = Low voltage level one set-up time prior to the Low-to-High
clock transition
X = Don’t care
= Low-to-High clock transition

74ABT273AD,118

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
Flip Flops OCTAL D-TYPE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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