74AHC_AHCT574_2 © NXP B.V. 2008. All rights reserved.
Product data sheet Rev. 02 — 24 January 2008 5 of 18
NXP Semiconductors
74AHC574; 74AHCT574
Octal D-type flip-flop; positive edge-trigger; 3-state
6. Functional description
[1] H = HIGH voltage level;
h = HIGH voltage level one setup time prior to the HIGH-to-LOW CP transition;
L = LOW voltage level;
l = LOW voltage level one setup time prior to the HIGH-to-LOW CP transition;
Z = high-impedance OFF-state;
↑ = LOW-to-HIGH clock transition.
7. Limiting values
[1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
[2] P
tot
derates linearly with 8 mW/K above 70 °C.
[3] P
tot
derates linearly with 5.5 mW/K above 60 °C.
[4] P
tot
derates linearly with 4.5 mW/K above 60 °C.
Table 3. Function table
[1]
Operating mode Input Internal
flip-flop
Output
OE CP Dn Qn
Load and read register L ↑ lL L
L ↑ hH H
Load register and disable output H ↑ lL Z
H ↑ hH Z
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
V
CC
supply voltage −0.5 +7.0 V
V
I
input voltage −0.5 +7.0 V
I
IK
input clamping current V
I
< −0.5 V
[1]
−20 - mA
I
OK
output clamping current V
O
< −0.5 V or V
O
>V
CC
+ 0.5 V
[1]
- ±20 mA
I
O
output current V
O
= −0.5 V to (V
CC
+ 0.5 V) - ±25 mA
I
CC
supply current - 75 mA
I
GND
ground current −75 - mA
T
stg
storage temperature −65 +150 °C
P
tot
total power dissipation T
amb
= −40 °C to +125 °C
SO20 package
[2]
- 500 mW
TSSOP20 package
[3]
- 500 mW
DHVQFN20 package
[4]
- 500 mW
