ADG526A/ADG527A
Rev. C | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
DD
to V
SS
44 V
V
DD
to GND 25 V
V
SS
to GND
25 V
Analog Inputs
1
Voltage at Sx or Dx Pins
V
SS
− 2 V to V
DD
+ 2 V
or 20 mA, whichever
occurs first
Continuous Current, Sx or Dx Pins 20 mA
Pulsed Current, Sx or Dx Pins
1 ms Duration, 10% Duty Cycle 40 mA
Digital Inputs
1
Voltage at A, EN, WR, RS
V
SS
4 V to V
DD
+ 4 V
or 20 mA, whichever
occurs first
Power Dissipation (Any Package)
Up to 75°C 470 mW
Derates Above 75°C 6 mW/°C
Operating Temperature Range
Commercial (K Version)
40°C to +85°C
Industrial (B Version)
40°C to +85°C
Storage Temperature Range
65°C to +150°C
Lead Temperature (Soldering, 10 sec) 300°C
1
Overvoltage at A, EN,
WR
,
RS
, Sx, or Dx pins are clamped by diodes. Limit
current to the maximum rating in . Table 3
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ADG526A/ADG527A
Rev. C | Page 8 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
V
DD
1
NC
2
RS
3
S16
4
D
28
V
SS
27
S8
26
S7
25
S15
5
S6
24
S14
6
S5
23
S13
7
S4
22
S12
8
S3
21
S11
9
S2
20
S10
10
S1
19
S9
11
EN
18
GND
12
A0
17
WR
13
A1
16
A3
14
A2
15
NC = NO CONNECT
ADG526A
TOP VIEW
(Not to Scale)
0
1532-005
Figure 3. ADG526A PDIP, SOIC, and CERDIP Pin Configuration
1282726234
5
6
7
8
9
10
11
25
24
23
22
21
20
19
NC = NO CONNECT
S15
S14
S13
S12
S11
S10
S09
S7
S6
S5
S4
S3
S2
S1
S16
RS
NC
V
DD
D
V
SS
S8
GND
WR
A3
A2
A1
A0
EN
PIN 1
IDENTFIER
12 13 14 15 16 17 18
ADG526A
TOP VIEW
(Not to Scale)
0
1532-007
Figure 4. ADG526A PLCC Pin Configuration
Table 4. ADG526A Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Most Positive Power Supply Potential.
2 NC No Connect.
3
RS
Reset. The RS signal clears both the address and enable data in the latches resulting in no output (all switches off).
4 S16 Source Terminal. This pin can be an input or output.
5 S15 Source Terminal. This pin can be an input or output.
6 S14 Source Terminal. This pin can be an input or output.
7 S13 Source Terminal. This pin can be an input or output.
8 S12 Source Terminal. This pin can be an input or output.
9 S11 Source Terminal. This pin can be an input or output.
10 S10 Source Terminal. This pin can be an input or output.
11 S9 Source Terminal. This pin can be an input or output.
12 GND Ground (0 V) Reference.
13
WR
Write. The WR signal latches the state of the address control lines and the enable line.
14 A3 Logic Control Inputs. Selects which source terminal is connected to the drain (D).
15 A2 Logic Control Inputs. Selects which source terminal is connected to the drain (D).
16 A1 Logic Control Inputs. Selects which source terminal is connected to the drain (D).
17 A0 Logic control inputs. Selects which source terminal is connected to the drain (D).
18 EN Enable. Active high logic control input.
19 S1 Source Terminal. This pin can be an input or output.
20 S2 Source Terminal. This pin can be an input or output.
21 S3 Source Terminal. This pin can be an input or output.
22 S4 Source Terminal. This pin can be an input or output.
23 S5 Source Terminal. This pin can be an input or output.
24 S6 Source Terminal. This pin can be an input or output.
25 S7 Source Terminal. This pin can be an input or output.
26 S8 Source Terminal. This pin can be an input or output.
27 V
SS
Most Negative Power Supply Potential.
28 D Drain Terminal. This pin can be an input or output.
ADG526A/ADG527A
Rev. C | Page 9 of 20
DA
V
SS
S8A
S7A
S6A
S5A
S4A
S3A
S2A
S1A
EN
A0
A1
A2
V
DD
DB
S8B
S7B
S6B
S5B
S4B
S3B
S2B
S1B
GND
NC
RS
WR
1
2
3
4
28
27
26
25
5
6
7
24
23
22
8 21
9 20
10 19
11 18
12 17
13 16
14 15
NC = NO CONNECT
ADG527A
TOP VIEW
(Not to Scale)
01532-006
Figure 5. ADG527A PDIP, SOIC Pin Configuration
1282726234
5
6
7
8
9
10
11
25
24
23
22
21
20
19
NC = NO CONNECT
S7B
S6B
S5B
S4B
S3B
S2B
S1B
S7A
S6A
S5A
S4A
S3A
S2A
S1A
S8B
RS
DB
V
DD
DA
V
SS
S8A
GND
WR
NC
A2
A1
A0
EN
PIN 1
IDENTFIER
12 13 14 15 16 17 18
ADG527A
TOP VIEW
(Not to Scale)
01532-008
Figure 6. ADG527A PLCC Pin Configuration
Table 5. ADG527A Pin Function Descriptions
Pin No. Mnemonic Description
1 V
DD
Most Positive Power Supply Potential.
2 DB Drain Terminal. This pin can be an input or output.
3
RS
Reset. The RS signal clears both the address and enable data in the latches resulting in no output (all switches off).
4 S8B Source Terminal. This pin can be an input or output.
5 S7B Source Terminal. This pin can be an input or output.
6 S6B Source Terminal. This pin can be an input or output.
7 S5B Source Terminal. This pin can be an input or output.
8 S4B Source Terminal. This pin can be an input or output.
9 S3B Source Terminal. This pin can be an input or output.
10 S2B Source Terminal. This pin can be an input or output.
11 S1B Source Terminal. This pin can be an input or output.
12 GND Ground (0 V) Reference.
13
WR
Write. The WR signal latches the state of the address control lines and the enable line.
14 NC No Connect.
15 A2 Logic Control Inputs. Selects which source terminal is connected to the drain (D).
16 A1 Logic Control Inputs. Selects which source terminal is connected to the drain (D).
17 A0 Logic Control Inputs. Selects which source terminal is connected to the drain (D).
18 EN Enable. Active high logic control input.
19 S1A Source Terminal. This pin can be an input or output.
20 S2A Source Terminal. This pin can be an input or output.
21 S3A Source Terminal. This pin can be an input or output.
22 S4A Source Terminal. This pin can be an input or output.
23 S5A Source Terminal. This pin can be an input or output.
24 S6A Source Terminal. This pin can be an input or output.
25 S7A Source Terminal. This pin can be an input or output.
26 S8A Source Terminal. This pin can be an input or output.
27 V
SS
Most Negative Power Supply Potential.
28 DA Drain Terminal. This pin can be an input or output.

ADG526AKRZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Multiplexer Switch ICs 16:1 CMOS Latched
Lifecycle:
New from this manufacturer.
Delivery:
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