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VS-P404

P1-P3P4-P6P7-P8
VS-P400 Series
www.vishay.com
Vishay Semiconductors
Revision: 27-Mar-14
1
Document Number: 93755
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Power Modules,
Passivated Assembled Circuit Elements, 40 A
FEATURES
• Glass passivated junctions for greater reliability
• Electrically isolated base plate
• Available up to 1200 V
RRM
/V
DRM
• High dynamic characteristics
• Wide choice of circuit configurations
• Simplified mechanical design and assembly
• UL E78996 approved
• Material categorization: For definitions of compliance
please see www.vishay.com/doc?99912
DESCRIPTION
The VS-P400 series of integrated power circuits consists of
power thyristors and power diodes configured in a single
package. With its isolating base plate, mechanical designs
are greatly simplified giving advantages of cost reduction
and reduced size.
Applications include power supplies, control circuits and
battery chargers.
ELECTRICAL SPECIFICATIONS
PRODUCT SUMMARY
I
O
40 A
Type Modules - Thyristor, Standard
Package PACE-PAK (D-19)
Circuit
Single phase, hybrid bridge common cathode,
Single phase, hybrid bridge doubler connection,
Single phase, all SCR bridge
PACE-PAK (D-19)
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL CHARACTERISTICS VALUES UNITS
I
O
80 °C 40 A
I
TSM
,
I
FSM
50 Hz 385
A
60 Hz 400
I
2
t
50 Hz 745
A
2
s
60 Hz 680
I
2
t 7450 A
2
s
V
RRM
Range 400 to 1200 V
V
ISOL
2500 V
T
J
-40 to 125 °C
T
Stg
VOLTAGE RATINGS
TYPE NUMBER
V
RRM
/V
DRM
, MAXIMUM
REPETITIVE PEAK REVERSE AND
PEAK OFF-STATE VOLTAGE
V
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
I
RRM
MAXIMUM
AT T
J
MAXIMUM
mA
VS-P401, VS-P421, VS-P431 400 500
10
VS-P402, VS-P422, VS-P432 600 700
VS-P403, VS-P423, VS-P433 800 900
VS-P404, VS-P424, VS-P434 1000 1100
VS-P405, VS-P425, VS-P435 1200 1300
VS-P400 Series
www.vishay.com
Vishay Semiconductors
Revision: 27-Mar-14
2
Document Number: 93755
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
ON-STATE CONDUCTION
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum DC output current
at case temperature
I
O
Full bridge circuits
40 A
80 °C
Maximum peak, one-cycle
non-repetitive on-state or
forward current
I
TSM
,
I
FSM
t = 10 ms
No voltage
reapplied
Sinusoidal half wave,
initial T
J
= T
J
maximum
385
A
t = 8.3 ms 400
t = 10 ms
100 % V
RRM
reapplied
325
t = 8.3 ms 340
Maximum I
2
t for fusing I
2
t
t = 10 ms
No voltage
reapplied
745
A
2
s
t = 8.3 ms 680
t = 10 ms
100 % V
RRM
reapplied
530
t = 8.3 ms 480
Maximum I
2
t for fusing I
2
t
t = 0.1 ms to 10 ms, no voltage reapplied
I
2
t for time tx = I
2
t · tx
7450 A
2
s
Low level value of threshold voltage V
T(TO)1
(16.7 % x x I
T(AV)
< I < x I
T(AV)
), T
J
= T
J
maximum 0.83
V
High level value of threshold voltage V
T(TO)2
(I > x I
T(AV)
), T
J
= T
J
maximum 1.03
Low level value of on-state slope resistance r
t1
(16.7 % x x I
T(AV)
< I < x I
T(AV)
), T
J
= T
J
maximum 9.61
m
High level value of on-state slope resistance r
t2
(I > x I
T(AV)
), T
J
= T
J
maximum 7.01
Maximum on-state voltage drop V
TM
I
TM
= x I
T(AV)
T
J
= 25 °C 1.4 V
Maximum forward voltage drop V
FM
I
FM
= x I
F(AV)
T
J
= 25 °C 1.4 V
Maximum non-repetitive rate of rise of
turned-on current
dI/dt
T
J
= 125 °C from 0.67 V
DRM
I
TM
= x I
T(AV)
, I
g
= 500 mA, t
r
< 0.5 μs, t
p
> 6 μs
200 A/μs
Maximum holding current I
H
T
J
= 25 °C anode supply = 6 V, resistive load
130
mA
Maximum latching current I
L
250
BLOCKING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum critical rate of rise of
off-state voltage
dV/dt T
J
= 125 °C, exponential to 0.67 V
DRM
gate open 200 V/μs
Maximum peak reverse and off-state
leakage current at V
RRM
, V
DRM
I
RRM
,
I
DRM
T
J
= 125 °C, gate open circuit 10 mA
Maximum peak reverse leakage current I
RRM
T
J
= 25 °C 100 μA
RMS isolation voltage V
ISOL
50 Hz, circuit to base, all terminals shorted,
T
J
= 25 °C, t = 1 s
2500 V
TRIGGERING
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum peak gate power P
GM
8
W
Maximum average gate power P
G(AV)
2
Maximum peak gate current I
GM
2A
Maximum peak negative gate voltage -V
GM
10 V
Maximum gate voltage required to trigger V
GT
T
J
= - 40 °C
Anode supply =
6 V resistive load
3
VT
J
= 25 °C 2
T
J
= 125 °C 1
Maximum gate current required to trigger I
GT
T
J
= - 40 °C 90
mAT
J
= 25 °C 60
T
J
= 125 °C 35
Maximum gate voltage that will not trigger V
GD
T
J
= 125 °C, rated V
DRM
applied
0.2 V
Maximum gate current that will not trigger I
GD
2mA
VS-P400 Series
www.vishay.com
Vishay Semiconductors
Revision: 27-Mar-14
3
Document Number: 93755
For technical questions within your region: DiodesAmericas@vishay.com
, DiodesAsia@vishay.com, DiodesEurope@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Note
(1)
A mounting compound is recommended and the torque should be checked after a period of 3 hours to allow for the spread of the compound
Fig. 1 - Current Ratings Nomogram (1 Module Per Heatsink)
Fig. 2 - On-State Power Loss Characteristics Fig. 3 - On-State Power Loss Characteristics
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER SYMBOL TEST CONDITIONS VALUES UNITS
Maximum junction operating
and storage temperature range
T
J
, T
Stg
-40 to 125 °C
Maximum thermal resistance,
junction to case per junction
R
thJC
DC operation 1.05
K/W
Maximum thermal resistance,
case to heatsink
R
thCS
Mounting surface, smooth and greased 0.10
Mounting torque, base to heatsink
(1)
4Nm
Approximate weight
58 g
2.0 oz.
Case style PACE-PAK (D-19)
Maximum Total Power Loss (W)
Total Output Current (A)
5 10152025
4030 35
0
0
120
100
80
60
40
20
T
J
= 125 °C
180°
(sine)
~
+
-
93755_01a
Maximum Total Power Loss (W)
Maximum Allowable
Ambient Temperature (°C)
25 7550 100 125
0
120
100
80
60
40
20
0
93755_01b
R
thSA
= 0.7 K/W - ΔR
1 K/W
2 K/W
3 K/W
5 K/W
1.5 K/W
10 K/W
Maximum Average On-State
Power Loss (W)
Average On-State Current (A)
10 200155
30
25
20
15
10
5
0
93755_02
Ø
Conduction angle
RMS limit
T
J
= 125 °C
Per junction
180°
120°
90°
60°
30°
Maximum Average On-State
Power Loss (W)
Average On-State Current (A)
20 3503010 15 255
40
25
20
35
30
15
10
5
0
93755_03
RMS limit
T
J
= 125 °C
Per junction
Conduction period
Ø
DC
180°
120°
90°
60°
30°
P1-P3P4-P6P7-P8

VS-P404

Mfr. #:
Buy VS-P404
Manufacturer:
Vishay Semiconductors
Description:
SCR Modules 1000 Volt 40 Amp
Lifecycle:
New from this manufacturer.
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