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CY2291FI

P1-P3P4-P6P7-P9P10-P12P13-P14
CY2291
Document #: 38-07189 Rev. *A Page 10 of 14
Switching Characteristics, Industrial 3.3V
Parameter Name Description Min. Typ. Max. Unit
t
1
Output Period Clock output range, 3.3V
operation
CY2291I 15
(66.6 MHz)
13000
(76.923 kHz)
ns
CY2291FI 16.66
(60 MHz)
13000
(76.923 kHz)
ns
Output Duty
Cycle
[11]
Duty cycle for outputs, defined as t
2
÷ t
1
[12]
f
OUT
> 66 MHZ
40% 50% 60%
Duty cycle for outputs, defined as t
2
÷ t
1
[12]
f
OUT
< 66 MHZ
45% 50% 55%
t
3
Rise Time Output clock rise time
[13]
35ns
t
4
Fall Time Output clock fall time
[13]
2.5 4 ns
t
5
Output Disable
Time
Time for output to enter three-state mode after
SHUTDOWN/OE goes LOW
10 15 ns
t
6
Output Enable
Time
Time for output to leave three-state mode after
SHUTDOWN
/OE goes HIGH
10 15 ns
t
7
Skew Skew delay between any identical or related out-
puts
[3, 12, 15]
< 0.25 0.5 ns
t
8
CPUCLK Slew Frequency transition rate 1.0 20.0 MHz/
ms
t
9A
Clock Jitter
[14]
Peak-to-peak period jitter (t
9A
Max. – t
9A
min.),%
of clock period (f
OUT
< 4 MHz)
<0.5 1 %
t
9B
Clock Jitter
[14]
Peak-to-peak period jitter (t
9B
Max. – t
9B
min.)
(4 MHz <
f
OUT
< 16 MHz)
<0.7 1 ns
t
9C
Clock Jitter
[14]
Peak-to-peak period jitter
(16 MHz < f
OUT
<
50 MHz)
<400 500 ps
t
9D
Clock Jitter
[14]
Peak-to-peak period jitter
(f
OUT
> 50 MHz)
<250 350 ps
t
10A
Lock Time for
CPLL
Lock Time from Power-Up <25 50 ms
t
10B
Lock Time for
UPLL and SPLL
Lock Time from Power-Up <0.25 1 ms
Slew Limits CPU PLL Slew Limits CY2291I 8 66.6 MHz
CY2291FI 8 60 MHz
Switching Waveforms
All Outputs, Duty Cycle and Rise/Fall Time
t
1
OUTPUT
t
2
t
3
t
4
[+] Feedback
CY2291
Document #: 38-07189 Rev. *A Page 11 of 14
Test Circuit
Switching Waveforms (continued)
Output Three-State Timing
t
5
OE
ALL
THREE-STATE
OUTPUTS
t
6
[4]
CLK Outputs Jitter and Skew
t
7
CLK
OUTPUT
RELATED
CLK
t
9A
CPU Frequency Change
SELECT
CPU
OLD SELECT NEW SELECT STABLE
F
old
F
new
t
8
&t
10
0.1 µF
V
DD
0.1 µF
V
DD
CLK out
C
LOAD
GND
OUTPUTS
[+] Feedback
CY2291
Document #: 38-07189 Rev. *A Page 12 of 14
CyClocks is a trademark of Cypress Semiconductor Corporation.
Pentium is a registered trademark of Intel Corporation.
Custom Configuration Request Procedure
The CY229x are EPROM-programmable devices that may be configured in the factory or in the field by a Cypress Field Applica-
tion Engineer (FAE). The output frequencies requested will be matched as closely as the internal PLL divider and multiplier options
allow. All custom requests must be submitted to your local Cypress FAE or sales representative. The method to use to request
custom configurations is:
Use CyClocks™ software. This software automatically calculates the output frequencies that can be generated by the CY229x
devices and provides a print-out of final pinout which can be submitted (in electronic or print format) to your local FAE or sales
representative. The CyClocks software is available free of charge from the Cypress website (http://www.cypress.com) or from
your local sales representative.
Once the custom request has been processed you will receive a part number with a 3-digit extension (e.g., CY2292SC-128)
specific to the frequencies and pinout of your device. This will be the part number used for samples requests and production
orders.
Ordering Information
Ordering Code
Package
Name Package Type
Operating
Range
Operating
Voltage
CY2291SC–XXX S5 20-Pin SOIC Commercial 5.0V
CY2291SL–XXX S5 20-Pin SOIC Commercial 3.3V
CY2291F S5 20-Pin SOIC Commercial 3.3V or 5.0V
CY2291SI–XXX S5 20-Pin SOIC Industrial 3.3V or 5.0V
CY2291FI S5 20-Pin SOIC Industrial 3.3V or 5.0V
Package Characteristics
Package θ
JA
(C/W) θ
JC
(C/W) Transistor Count
20-pin SOIC 125 25 9271
[+] Feedback
P1-P3P4-P6P7-P9P10-P12P13-P14

CY2291FI

Mfr. #:
Buy CY2291FI
Manufacturer:
Cypress Semiconductor
Description:
IC 3PLL EPROM CLOCK GEN 20-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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