ZXSC100
SINGLE CELL DC-DC CONVERTER SOLUTION
ZXSC100
Document number: DS33613 Rev. 6 - 2
8 of 13
www.diodes.com
January 2012
© Diodes Incorporated
ZXSC100X8 Obsolete
Closest
lternative is ZXSC100N8
Application Information (cont.)
Output Voltage Adjustment
The ZXSC100 is an adjustable converter allowing the end user the maximum flexibility in output voltage selection. For
adjustable operation a potential divider network is connected as indicated in the diagram.
The output voltage is determined by the equation:
V
OUT
= V
FB
(1 + RA / RB),
where V
FB
=730mV
The resistor values, RA and RB, should be maximised to improve efficiency and decrease battery drain. Optimisation can be
achieved by providing a minimum current of I
FB(MAX)
= 200nA to the V
BATT
pin. The output is adjustable from V
FB
to the
(BR)V
CEO
of the switching transistor, Q1.
Note: For the reference designs, RA is assigned the label R3 and RB the label R4.
External Transistor Base Drive Selection
Optimisation of the external switching transistor base drive may be necessary for improved efficiency in low power
applications. This can be achieved by introducing an external resistor between the supply and the RE pin of the ZXSC100.
The resistor value can be determined by:
Layout Issues
Layout is critical for the circuit to function optimally in terms of electrical efficiency, thermal considerations and noise.
For ‘step-up converters’ there are four main current loops, the input loop, power-switch loop, rectifier loop and output loop.
The supply charging the input capacitor forms the input loop. The power-switch loop is defined when Q1 is ‘on’, current flows
from the input through the inductor, Q1, R
SENSE
and to ground. When Q1 is ‘off’, the energy stored in the inductor is
transferred to the output capacitor and load via D1, forming the rectifier loop. The output loop is formed by the output
capacitor supplying the load when Q1 is switched back off.
To optimise for best performance each of these loops should be kept separate from each other and interconnections made
with short, thick traces thus minimising parasitic inductance, capacitance and resistance. Also the sense resistor R2 should
be connected, with minimum trace length, between emitter lead of Q1 and ground, again minimising stray parasitics.
