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DACs for Electronic Adjustment
High-precision 10bit
8ch/10ch D/A Converters
BU2506FV,BU2505FV
Description
BU2506FV and BU2505FV ICs are high performance 10bit R-2R type DACs with 8ch and 10ch outputs, respectively.
Cascade connection is possible, ensuring suitability with multi-channel applications. Each channel incorporates a full swing
output-type buffer amplifier with high speed output response characteristics, resulting in a greatly shortened wait time.
The ICs also utilize the TTL level input method, and with the RESET pin the output voltage can be kept in the lower reference
voltage range.
Features
1) High performance, multi-channel R-2R-type 10bit D/A converter built-in
(BU2506FV: 8 channels, BU2505FV: 10 channels)
2) Full swing output type buffer amplifier incorporated at each output channel
3) The RESET terminal can keep the output voltage at all channels within the lower reference voltage range
4) Digital input compatible with TTL levels
5) 14bit 3-line serial data + RESET signal input (address 4bit + data 10bit)
6) Cascade connection available
7) LSB first / MSB first of 10bit data can be changed by the REVERSE terminal
8) Compact package: 0.65mm pitch, 20 pins (SSOP-B20)
Applications
DVDs, CD-Rs, CD-RWs, Digital cameras
Lineup
Parameter BU2505FV BU2506FV
Power source voltage range 4.5 to 5.5V 4.5 to 5.5V
Number of channels 10ch 8ch
Differential non linearity error ±1.0LSB ±1.0LSB
Integral non linearity error ±3.5LSB ±3.5LSB
Data transfer frequency 10MHz 10MHz
Package SSOP-B20 SSOP-B20
Absolute Maximum Ratings(Ta=25)
Parameter Symbol Ratings Unit
Power source voltage VCC -0.3 to 6.0 V
D/A converter upper standard voltage VDD -0.3 to 6.0 V
Input voltage VIN -0.3 to 6.0 V
Output voltage VOUT -0.3 to 6.0 V
Storage temperature range Tstg -55 to 125
Power dissipation Pd 400
*
mW
* Derated at 4mW/ at Ta>25, mounted on a 70x70x1.6mm FR4 glass epoxy board (copper foil area less than 3%)
Note: These products are not robust against radiation
Recommended Operating Conditions(Ta=25)
Parameter Symbol Limits Unit
Power supply voltage range VCC 4.5 to 5.5 V
Operating temperature range Topr -30 to 85
No.11052EBT03
BU2506FV,BU2505FV
Technical Note
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Electrical Characteristics(Unless otherwise specified, VCC=5V, VrefH=5V, VrefL=0V, Ta=25)
Parameter Symbol
Limits
Unit Conditions
MIN. TYP. MAX.
<Digital unit>
Power source current ICC
- 0.85 2.8 mA At CLK=10MHz, IAO=0μA
Input leak current IILK -5 - 5 μA VIN=0 to VCC
Input voltage L VIL - - 0.8 V -
Input voltage H VIH 2.0 - - V -
Output voltage L VOL 0 - 0.4 V IOL=2.5mA
Output voltage H VOH 4.6 - 5 V IOH=-2.5mA
<Analog unit>
Consumption current IrefH
- 4.5 7.5 mA
Data condition : at maximum
current
- 3.7 6.2 mA
(*1)
D/A converter upper standard voltage
setting range
VrefH 3.0 - 5 V
Outputs are not necessarily within
the standard voltage setting range,
but ARE within the buffer amplifier
output voltage range (VO).
D/A converter lower standard voltage
setting range
VrefL 0 - 1.5 V
Buffer amplifier output voltage range VO
0.1 - 4.9
V
IO=±100μA
0.2 - 4.75 IO=±1.0mA
Buffer amplifier output drive range IO -2 - 2 mA
Upper side saturation voltage =0.35V
(on full scale setting, current sourcing)
Lower side saturation voltage =0.23V
(on zero scale setting, current sinking)
Precision
Differential non-linearity error DNL -1.0 - 1.0
LSB
VrefH
=4.796V
VrefL=0.7V
VCC=5.5V (4mV/LSB)
At no load (IO=+0mA )
Integral non-linearity error INL -3.5 - 3.5
Zero point error SZERO -25 - 25
mV
Full scale error SFULL -25 - 25
Buffer amplifier output impedance RO - 5 15 -
Pull-up I/O internal resistance value Rup 12.5 25 37.5 k
Input voltage 0V
(Resistance value changes
according to voltage supplied)
*1 Value in the case where CH1 ~ CH8 are set to maximum current after reset
BU2506FV,BU2505FV
Technical Note
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2011.04 - Rev.B
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Timing Characteristics(Unless otherwise specified, VCC=5V, VrefH=5V, VrefL=0V, Ta=25)
Parameter Symbol
Limits
Unit
Conditions
MIN. TYP. MAX. Judgment level is 80% / 20% of VCC.
Reset L pulse width tRTL
50 - -
nS
-
Clock L pulse width tCKL
50 - - -
Clock H pulse width tCKH 50 - - -
Clock rise time tcr
- - 50 -
Clock fall time tcf - - 50 -
Data setup time tDCH 20 - - -
Data hold time tCHD 40 - - -
Load setup time tCHL 50 - - -
Load hold time tLDC 50 - - -
Load H pulse width tLDH 50 - - -
Data output delay time tDO - - 90 CL=100pF
DA output settling time tLDD - 7 20 μS
CL100pF, VO: 0.5V4.5V.
Until output value deference from final
value becomes 1/2LSB.
(note) LD signal is level triggered. When LD input is on H level, internal shift-register state is loaded to DAC control latch.
Clock transition during LD=H is inhibited.
CLK
DI
LD
DA
OUTPUT
tCKL
tcr tCKH tcf
tDCH tCHD
tCHL
tLDH
tLDC
tLDD
DO
OUTPUT
tDo
RESET
tRTL

BU2505FV-E2

Mfr. #:
Manufacturer:
Description:
Digital to Analog Converters - DAC 10 BIT D/A CNVTR
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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