LTC3803HS6-3#TRMPBF Datasheet LTC3803MPS6-3#TRMPBF, LTC3803MPS6-3#TRPBF, LTC3803HS6-3#TRMPBF | P7-P9

LTC3803-3

38033fd

OPERATION

The LTC3803-3 is a constant frequency current mode con-

troller for ﬂ yback and DC/DC boost converter applications

in a tiny ThinSOT package. The LTC3803-3 is designed so

that none of its pins need to come in contact with the input

or output voltages of the power supply circuit of which it

is a part, allowing the conversion of voltages well beyond

the LTC3803-3’s absolute maximum ratings.

Main Control Loop

Due to space limitations, the basics of current mode DC/DC

conversion will not be discussed here; instead, the reader

is referred to the detailed treatment in Application Note 19,

or in texts such as Abraham Pressman’s Switching Power

Supply Design.

Please refer to the Block Diagram and the Typical Ap-

plication on the front page of this data sheet. An external

resistive voltage divider presents a fraction of the output

voltage to the V

pin. The divider must be designed so

that when the output is at the desired voltage, the V

voltage will equal the 800mV from the internal reference.

If the load current increases, the output voltage will de-

crease slightly, causing the V

pin voltage to fall below

800mV. The error ampliﬁ er responds by feeding current

into the I

/RUN pin. If the load current decreases, the

voltage will rise above 800mV and the error ampliﬁ er

will sink current away from the I

/RUN pin.

The voltage at the I

/RUN pin commands the pulse-width

modulator formed by the oscillator, current comparator

and RS latch. Speciﬁ cally, the voltage at the I

/RUN pin

sets the current comparator’s trip threshold. The current

comparator monitors the voltage across a current sense

resistor in series with the source terminal of the external

MOSFET. The LTC3803-3 turns on the external power

MOSFET when the internal free-running 300kHz oscillator

sets the RS latch. It turns off the MOSFET when the cur-

rent comparator resets the latch or when 80% duty cycle

is reached, whichever happens ﬁ rst. In this way, the peak

current levels through the ﬂ yback transformer’s primary

and secondary are controlled by the I

/RUN voltage.

Since the I

/RUN voltage is increased by the error ampli-

ﬁ er whenever the output voltage is below nominal, and

decreased whenever output voltage exceeds nominal, the

voltage regulation loop is closed. For example, whenever

the load current increases, output voltage will decrease

slightly, and sensing this, the error ampliﬁ er raises the

/RUN voltage by sourcing current into the I

/RUN pin,

raising the current comparator threshold, thus increasing

the peak currents through the transformer primary and

secondary. This delivers more current to the load, bringing

the output voltage back up.

The I

/RUN pin serves as the compensation point for

the control loop. Typically, an external series RC network

is connected from I

/RUN to ground and is chosen for

optimal response to load and line transients. The impedance

of this RC network converts the output current of the error

ampliﬁ er to the I

/RUN voltage which sets the current

comparator threshold and commands considerable inﬂ u-

ence over the dynamics of the voltage regulation loop.

Start-Up/Shutdown

The LTC3803-3 has two shutdown mechanisms to disable

and enable operation: an undervoltage lockout on the V

supply pin voltage, and a forced shutdown whenever ex-

ternal circuitry drives the I

/RUN pin low. The LTC3803-3

transitions into and out of shutdown according to the state

diagram (Figure 1).

LTC3803-3

SHUT DOWN

ITH/RUN

< V

ITHSHDN

(NOMINALLY 0.28V)

38033 F01

< V

TURNOFF

(NOMINALLY 5.7V)

ITH/RUN

> V

ITHSHDN

AND V

> V

TURNON

(NOMINALLY 8.7V)

LTC3803-3

ENABLED

Figure 1. Start-Up/Shutdown State Diagram

LTC3803-3

38033fd

OPERATION

The undervoltage lockout (UVLO) mechanism prevents

the LTC3803-3 from trying to drive a MOSFET with in-

sufﬁ cient V

. The voltage at the V

pin must exceed

TURNON

(nominally 8.7V) at least momentarily to enable

LTC3803-3 operation. The V

voltage is then allowed

to fall to V

TURNOFF

(nominally 5.7V) before undervoltage

lockout disables the LTC3803-3. This wide UVLO hysteresis

range supports the use of a bias winding on the ﬂ yback

transformer to power the LTC3803-3—see the section

Powering the LTC3803-3.

The I

/RUN pin can be driven below the shutdown

threshold (V

ITHSHDN

) to force the LTC3803-3 into shut-

down. An internal 0.3μA current source always tries to

pull this pin towards V

. When the I

/RUN pin voltage

is allowed to exceed V

ITHSHDN

, and V

exceeds V

TURNON

the LTC3803-3 begins to operate and an internal clamp

immediately pulls the I

/RUN pin up to about 0.7V. In

operation, the I

/RUN pin voltage will vary from roughly

0.7V to 1.9V to represent current comparator thresholds

from zero to maximum.

Internal Soft-Start

An internal soft-start feature is enabled whenever the

LTC3803-3 comes out of shutdown. Speciﬁ cally, the I

RUN voltage is clamped and is prevented from reaching

maximum until roughly 1.4ms has passed. This allows

the input and output currents of LTC3803-3-based power

supplies to rise in a smooth and controlled manner on

start-up.

Powering the LTC3803-3

In the simplest case, the LTC3803-3 can be powered from

a high voltage supply through a resistor. A built-in shunt

regulator from the V

pin to GND will draw as much

current as needed through this resistor to regulate the

voltage to around 9.5V as long as the V

pin is not

forced to sink more than 25mA. This shunt regulator is

always active, even when the LTC3803-3 is in shutdown,

since it serves the vital function of protecting the V

from seeing too much voltage.

For higher efﬁ ciency or for wide V

range applications,

ﬂ yback controllers are typically powered through a separate

bias winding on the ﬂ yback transformer. The LTC3803-3

has the wide UVLO hysteresis (1V min) and small V

supply current draw (<90μA when V

< V

TURNON

) that is

needed to support such bootstrapped hysteretic start-up

schemes.

The V

pin must be bypassed to ground immediately

adjacent to the IC pins with a minimum of a 1μF ceramic

or tantalum capacitor. Proper supply bypassing is neces-

sary to supply the high transient currents required by the

MOSFET gate driver.

Adjustable Slope Compensation

The LTC3803-3 injects a 5μA peak current ramp out through

its SENSE pin which can be used for slope compensation in

designs that require it. This current ramp is approximately

linear and begins at zero current at 8% duty cycle, reach-

ing peak current at 80% duty cycle. Additional details are

provided in the Applications Information section.

LTC3803-3

38033fd

APPLICATIONS INFORMATION

Many LTC3803-3 application circuits can be derived from

the topology shown in Figure 2.

The LTC3803-3 itself imposes no limits on allowed power

output, input voltage V

or desired regulated output voltage

OUT

; these are all determined by the ratings on the external

power components. The key factors are: Q1’s maximum

drain-source voltage (BV

DSS

), on-resistance (R

DS(ON)

)

and maximum drain current, T1’s saturation ﬂ ux level and

winding insulation breakdown voltages, C

and C

OUT

’s

maximum working voltage, ESR, and maximum ripple

current ratings, and D1 and R

SENSE

’s power ratings.

/RUN

LTC3803-3

GND

NGATE

SENSE

•

OUT

SEC

PRI

BIAS

VCC

OUT

38033 F02

SENSE

START

•

Figure 2. Typical LTC3803-3 Application Circuit

SELECTING FEEDBACK RESISTOR DIVIDER VALUES

The regulated output voltage is determined by the resistor

divider across V

OUT

(R1 and R2 in Figure 2). The ratio

of R2 to R1 needed to produce a desired V

OUT

can be

calculated:

OUT

0 8

–.

•

Choose resistance values for R1 and R2 to be as large as

possible in order to minimize any efﬁ ciency loss due to

the static current drawn from V

OUT

, but just small enough

so that when V

OUT

is in regulation, the error caused by

the nonzero input current to the V

pin is less than 1%.

A good rule of thumb is to choose R1 to be 80k or less.

TRANSFORMER DESIGN CONSIDERATIONS

Transformer speciﬁ cation and design is perhaps the most

critical part of applying the LTC3803-3 successfully. In

addition to the usual list of caveats dealing with high fre-

quency power transformer design, the following should

prove useful.

Turns Ratios

Due to the use of the external feedback resistor divider

ratio to set output voltage, the user has relative freedom

in selecting transformer turns ratio to suit a given appli-

cation. Simple ratios of small integers, e.g., 1:1, 2:1, 3:2,

etc. can be employed which yield more freedom in setting

total turns and mutual inductance. Simple integer turns

ratios also facilitate the use of “off-the-shelf” conﬁ gu-

rable transformers such as the Coiltronics VERSA-PAC

™

series in applications with high input to output voltage

ratios. For example, if a 6-winding VERSA-PAC is used

with three windings in series on the primary and three

windings in parallel on the secondary, a 3:1 turns ratio

will be achieved.

Turns ratio can be chosen on the basis of desired duty

cycle. However, remember that the input supply voltage

plus the secondary-to-primary referred version of the

ﬂ yback pulse (including leakage spike) must not exceed

the allowed external MOSFET breakdown rating.

Leakage Inductance

Transformer leakage inductance (on either the primary

or secondary) causes a voltage spike to occur after the

output switch (Q1) turn-off. This is increasingly prominent

at higher load currents, where more stored energy must

be dissipated. In some cases a snubber circuit will be

required to avoid overvoltage breakdown at the MOSFET’s

drain node. Application Note 19 is a good reference on

snubber design.

A biﬁ lar or similar winding technique is a good way to

minimize troublesome leakage inductances. However,

remember that this will limit the primary-to-second-

ary breakdown voltage, so biﬁ lar winding is not always

practical.

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Switching Voltage Regulators Constant Frequency Current Mode Flyback DC/DC Controller in ThinSOT

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