© Semiconductor Components Industries, LLC, 2016
January, 2016 − Rev. 8
1 Publication Order Number:
NCP5181/D
NCP5181
High Voltage High and Low
Side Driver
The NCP5181 is a High Voltage Power MOSFET Driver providing
two outputs for direct drive of 2 N−channel power MOSFETs arranged
in a half−bridge (or any other high−side + low−side) configuration.
It uses the bootstrap technique to insure a proper drive of the
High−side power switch. The driver works with 2 independent inputs
to accommodate any topology (including half−bridge, asymmetrical
half−bridge, active clamp and full−bridge).
Features
High Voltage Range: up to 600 V
dV/dt Immunity ±50 V/nsec
Gate Drive Supply Range from 10 V to 20 V
High and Low DRV Outputs
Output Source / Sink Current Capability 1.4 A / 2.2 A
3.3 V and 5 V Input Logic Compatible
Up to V
CC
Swing on Input Pins
Matched Propagation Delays between Both Channels
Outputs in Phase with the Inputs
Independent Logic Inputs to Accommodate All Topologies
Under V
CC
LockOut (UVLO) for Both Channels
Pin to Pin Compatible with IR2181(S)
These are Pb−Free Devices
Applications
High Power Energy Management
Half−bridge Power Converters
Any Complementary Drive Converters (asymmetrical half−bridge,
active clamp)
Full−bridge Converters
Bridge Inverters for UPS Systems
PIN ASSIGNMENT
PIN FUNCTION
IN_HI Logic Input for High Side Driver Output In Phase
IN_LO Logic Input for Low Side Driver Output In Phase
GND Ground
DRV_LO Low Side Gate Drive Output
V
CC
Low Side and Main Power Supply
V
BOOT
Bootstrap Power Supply
DRV_HI High Side Gate Drive Output
BRIDGE Bootstrap Return or High Side Floating Supply Return
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MARKING DIAGRAMS
PDIP−8
P SUFFIX
CASE 626
Device Package Shipping
ORDERING INFORMATION
NCP5181P,
5181 = Specific Device Code
A = Assembly Location
L = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
NCP5181P
AWL
YYWWG
SOIC−8
D SUFFIX
CASE 751
NCP5181PG PDIP−8
(Pb−Free)
50 Units/Tube
NCP5181DR2G SOIC−8
(Pb−Free)
2.500/Tape & Ree
l
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
IN_HI
IN_LO
GND
DRV_LO
V
BOOT
DRV_HI
BRIDGE
V
CC
5181
ALYWX
G
1
8
1
8
NCP5181
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2
Q1
Q2
C5
C6
C4
C3
GND
GND
GND
SG3526
MC34025
TL594
GND
GND
Out+
Out−
U2
R1
D3
GND
L1D1
D2
T1
5
IN_HI
1
IN_LO
2
GND
3
DRV_LO
4
Bridge
6
DRV_HI
7
VBOOT
8
U1
NCP51XX
C3
C1
D4
Figure 1. Typical Application
V
bulk
V
CC
V
CC
LEVEL
SHIFTER
R
S Q
PULSE
TRIGGER
GND
GND
GND
DRV_HI
GND
GND
UV
DETECT
UV
DETECT
DELAY
GND
Figure 2. Detailed Block Diagram
V
CC
IN_LO
IN_HI
V
CC
BRIDGE
DRV_LODRV_LO
VBOOT
DRV_HI
V
CC
Q
NCP5181
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3
MAXIMUM RATINGS
Rating Symbol Value Unit
Main Power Supply Voltage V
CC
−0.3 to 20 V
VHV: High Voltage BOOT Pin V
BOOT
−1 to 620 V
VHV: High Voltage BRIDGE Pin V
BRIDGE
−1 to 600 V
VHV: Floating Supply Voltage V
BOOT
− V
BRIDGE
0 to 20 V
VHV: High Side Output Voltage V
DRV_HI
V
BRIDGE
−0.3 to V
BOOT
+0.3 V
Low Side Output Voltage V
DRV_LO
−0.3 to V
CC
+0.3 V
Allowable Output Slew Rate dV
BRIDGE
/d
t
50 V/ns
Inputs IN_HI, IN_LO V
IN_XX
−1.0 to V
CC
+0.3 V
ESD Capability:
Human Body Model (All Pins Except Pins 6−7−8)
Machine Model (All Pins Except Pins 6−7−8)
2.0
200
kV
V
Latchup Capability per Jedec JESD78
Power Dissipation and Thermal Characteristics
PDIP8: Thermal Resistance, Junction−to−Air
SO−8: Thermal Resistance, Junction−to−Air
R
q
JA
R
q
JA
100
178
°C/W
Maximum Operating Junction Temperature T
J_max
+150 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

NCP5181DR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Gate Drivers HV MOSFET DRIVER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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