LT3798
15
3798fa
OPERATION
MOSFET and Diode Selection
With a strong 1.9A gate driver, the LT3798 can effectively
drive most high voltage MOSFETs. A low Qg MOSFET is
recommended to maximize efficiency. In most applications,
the R
DS(ON)
should be chosen to limit the temperature rise
of the MOSFET. The drain of the MOSFET is stressed to
V
OUT
• N
PS
+ V
IN
during the time the MOSFET is off and
the secondary diode is conducting current. But in most
applications, the leakage inductance voltage spike exceeds
this voltage. The voltage of this stress is determined by the
switch voltage clamp. Always check the switch waveform
with an oscilloscope to make sure the leakage inductance
voltage spike is below the breakdown voltage of the MOS-
FET. A transient voltage suppressor and diode are slower
than the leakage inductance voltage spike, therefore causing
a higher voltage than calculated.
The secondary diode stress may be as much as V
OUT
+ 2
• V
IN
/N
PS
due to the anode of the diode ringing with the
secondary leakage inductance. An RC snubber in parallel
with the diode eliminates this ringing, so that the reverse
voltage stress is limited to V
OUT
+ V
IN
/N
PS
. With a high
N
PS
and output current greater than 3A, the I
RMS
through
the diode can become very high and a low forward drop
Schottky is recommended.
Discontinuous Mode Detection
The discontinuous mode detector uses AC-coupling to
detect the ringing on the third winding. A 22pF capacitor
with a 30k resistor in series is recommended in most
designs. Depending on the amount of leakage inductance
ringing, an additional current may be needed to prevent
false tripping from the leakage inductance ringing. A resis-
tor from INTV
CC
to the DCM pin adds this current. Up to
an additional 100μA of current may be needed in some
cases. The DCM pin is roughly 0.7V, therefore the resistor
value is selected using the following equation:
R =
I
where I is equal to the additional current into the DCM pin.
Power Factor Correction/Harmonic Content
The LT3798 attains high power factor and low harmonic
content by making the peak current of the main power
switch proportional to the line voltage by using an internal
multiplier. A power factor of >0.97 is easily attainable for
most applications by following the design equations in
this data sheet. With proper design, LT3798 applications
can easily meet most harmonic standards.
Operation Under Light Output Loads
The LT3798 detects output overvoltage conditions by
looking at the voltage on the third winding. The third
winding voltage is proportional to the output voltage when
the main power switch is off and the secondary diode is
conducting current. Sensing the output voltage requires
delivering power to the output. When the output current is
very low, this periodic delivery of output current can exceed
the load current. The OVP pin sets the output overvolt-
age threshold. When the output of the sample-and-hold
is above this voltage, the minimum switching frequency
is divided by 8 as shown in Figure 5. This OVP threshold
needs to be set above 1.35V and should be set out of the
way of output voltage transients. The output clamp point
is set with the following formula:
V
OUT
= V
OVP
(R4 + R5)/(N
ST
• R5)–(V
F
+ (R4•I
TC
)/N
ST
)
The V
OVP
pin voltage may be provided by a resistor divider
from the V
REF
pin. This frequency division greatly reduces
the output current delivered to the output but a Zener or
resistor is required to dissipate the remaining output cur-
rent. The Zener diode’s voltage needs to be 5% higher than
the output voltage set by the resistor divider connected to
the FB pin. Multiple Zener diodes in series may be needed
for higher output power applications to keep the Zener’s
temperature within the specification.
