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EL1881CS-T7

P1-P3P4-P6P7-P9P10-P12P13-P13
1
®
FN7018.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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EL1881
Sync Separator, Low Power
The EL1881 video sync separator is manufactured using
Elantec’s high performance analog CMOS process. This
device extracts sync timing information from both standard
and non-standard video input. It provides composite sync,
vertical sync, burst/back porch timing, and odd/even field
detection. Fixed 70mV sync tip slicing provides sync edge
detection when the video input level is between 0.5V
P-P
and
-2V
P-P
(sync tip amplitude 143mV to 572mV). A single
external resistor sets all internal timing to adjust for various
video standards. The composite sync output follows video in
sync pulses and a vertical sync pulse is output on the rising
edge of the first vertical serration following the vertical
pre-equalizing string. For non-standard vertical inputs, a
default vertical pulse is output when the vertical signal stays
low for longer than the vertical sync default delay time. The
odd/even output indicates field polarity detected during the
vertical blanking interval. The EL1881 is plug-in compatible
with the industry-standard LM1881 and can be substituted
for that part in 5V applications with lower required supply
current.
The EL1881 is available in the 8 Ld PDIP and SOIC
packages and is specified for operation over the full -40°C to
+85°C temperature range
Pinout
EL1881
(8 LD PDIP, SOIC)
TOP VIEW
Features
• NTSC, PAL, SECAM, non-standard video sync separation
• Fixed 70mV slicing of video input levels from 0.5V
P-P
to
2V
P-P
• Low supply current - 1.5mA typ.
• Single +5V supply
• Composite, vertical sync output
• Odd/even field output
• Burst/back porch output
• Available in 8 Ld PDIP and SOIC packages
• Pb-free available (RoHS Compliant)
Applications
• Video amplifiers
• PCMCIA applications
•A/D drivers
• Line drivers
• Portable computers
• High-speed communications
• RGB applications
• Broadcast equipment
• Active filtering
Demo Board
A dedicated demo board is available.
COMPOSITE SYNC OUT
COMPOSITE VIDEO IN
VERTICAL SYNC OUT
GND
V
DD
5V
ODD/EVEN OUTPUT
R
SET
BUST/BACK
PORCH OUTPUT
1
2
3
4
8
7
6
5
Data Sheet September 15, 2011
2
FN7018.2
September 15, 2011
Pin Descriptions
PIN NUMBER PIN NAME PIN FUNCTION
1 Composite Sync
Out
Composite sync pulse output; sync pulses start on a falling edge and end on a rising edge
2 Composite Video
In
AC coupled composite video input; sync tip must be at the lowest potential (positive picture phase)
3 Vertical Sync Out Vertical sync pulse output; the falling edge of vert sync is the start of the vertical period
4 GND Supply ground
5 Burst/Back Porch
Output
Burst/back porch output; low during burst portion of composite video
6R
SET
(Note 1) An external resistor to ground sets all internal timing; a 681k 1% resistor will provide correct timing for
NTSC signals
7 Odd/Even Output Odd/even field output; high during odd fields, low during even fields; transitions occur at start of vert sync
pulse
8 VDD 5V Positive supply (5V)
NOTE:
1. R
SET
must be a 1% resistor
Ordering Information
PART NUMBER PART MARKING PACKAGE PKG. DWG. #
EL1881CN EL1881CN 8 Ld PDIP E8.3
EL1881CS 1881CS 8 Ld SOIC M8.15E
EL1881CS-T7 (Note 2) 1881CS 8 Ld SOIC (Tape & Reel) M8.15E
EL1881CSZ (Notes 3, 4) 1881CSZ 8 Ld SOIC (Pb-free) M8.15E
EL1881CSZ-T7 (Notes 2, 3, 4) 1881CSZ 8 Ld SOIC (Pb-free, Tape & Reel) M8.15E
EL1881CSZ-T13 (Notes 2, 3, 4)) 1881CSZ 8 Ld SOIC (Pb-free, Tape & Reel) M8.15E
NOTES:
2. Please refer to TB347 for details on reel specifications.
3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
4. For Moisture Sensitivity Level (MSL), please see device information page for EL1881
. For more information on MSL, please see Technical Brief
TB363
.
EL1881
3
FN7018.2
September 15, 2011
Absolute Maximum Ratings (T
A
= +25°C) Thermal Information
V
CC
Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Pin Voltages. . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to V
CC
+0.5V
Thermal Resistance (Typical, Note 5) θ
JA
(°C/W)
8 Lead PDIP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
8 Lead SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 to 120
Operating Ambient Temperature Range . . . . . . . . . .-40°C to +85°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .400mW
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTE:
5. θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
DC Electrical Specifications V
DD
= 5V, T
A
= +25°C, R
SET
= 681kΩ, unless otherwise specified.
PARAMETER DESCRIPTION MIN TYP MAX UNIT
I
DD
, Quiescent V
DD
= 5V 0.75 1.5 3 mA
Clamp Voltage Pin 2, I
LOAD
= -100µA 1.35 1.5 1.65 V
Clamp Discharge Current Pin 2 = 2V 6 12 16 µA
Clamp Charge Current Pin 2 = 1V -1.3 -1 0.7 mA
R
SET
Pin Reference Voltage Pin 6 1.1 1.22 1.35 V
V
OL
Output Low Voltage I
OL
= 1.6mA 0.24 0.5 V
V
OH
Output High Voltage I
OH
= -40µA 4 4.8 V
I
OH
= -1.6mA 3 4.6 V
Dynamic Specifications
PARAMETER DESCRIPTION MIN TYP MAX UNIT
Comp Sync Prop Delay, t
CS
See Figure 20 20 35 75 ns
Vertical Sync Width, t
VS
Normal or Default Trigger, 50% to 50% 190 230 300 µs
Vertical Sync Default Delay, t
VSD
See Figure 21 35 62 85 µs
Burst/Back Porch Delay, t
BD
See Figure 20 120 200 300 ns
Burst/Back Porch Width, t
B
See Figure 20 2.5 3.5 4.5 µs
Input Dynamic Range Video Input Amplitude to Maintain 50% Slice Spec 0.5 2 V
P-P
Slice Level V
SLICE
/V
CLAMP
55 70 85 mV
EL1881
P1-P3P4-P6P7-P9P10-P12P13-P13

EL1881CS-T7

Mfr. #:
Buy EL1881CS-T7
Manufacturer:
Renesas / Intersil
Description:
IC VIDEO SYNC SEPARATOR 8-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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