CY22801FXCT

CY22801
Document #: 001-15571 Rev. *B Page 4 of 7
Absolute Maximum Conditions
Parameter Description Min Max Unit
V
DD
Supply Voltage –0.5 4.6 V
T
S
Storage Temperature –65 150 °C
T
J
Junction Temperature 125 °C
V
IO
Input and Output Voltage V
SS
– 0.5 V
DD
+ 0.5 V
ESD Electro-Static Discharge Voltage per MIL-STD-833, Method 3015 2000 V
Recommended Operating Conditions
Parameter Description Min Typ Max Unit
V
DD
Operating Voltage 3.14 3.3 3.47 V
T
A
Ambient Temperature, Commercial Grade 0 70 °C
Ambient Temperature, Industrial Grade –40 -- 85 °C
C
LOAD
Max. Load Capacitance on the CLK output 15 pF
t
PU
Power up time for VDD to reach minimum specified voltage
(power ramps must be monotonic)
0.05 500 ms
Recommended Crystal Specifications
Parameter Name Description Min Typ Max Unit
F
NOM
Nominal Crystal Frequency Parallel resonance, fundamental mode,
and AT cut
8–30MHz
C
LNOM
Nominal Load Capacitance 6 30 pF
R
1
Equivalent Series Resistance
(ESR)
Fundamental mode 35 50 Ω
DL Crystal Drive Level No external series resistor assumed 0.5 2 mW
Notes
2. Not 100% tested, guaranteed by design.
3. I
DD
current specified for three CLK outputs running at 100 MHz.
4. Use CyClocksRT to calculate actual I
DD
for specific output frequency configurations.
DC Electrical Specifications
[2]
Parameter Name Description Min Typ Max Unit
I
OH
Output High Current V
OH
= V
DD
– 0.5, V
DD
= 3.3V (source) 12 24 mA
I
OL
Output Low Current V
OL
= 0.5, V
DD
= 3.3V (sink) 12 24 mA
V
IH
Input High Voltage 0.7*V
DD
–V
DD
+ 0.3 V
V
IL
Input Low Voltage V
SS
– 0.3 0.3*V
DD
V
C
IN1
Input Capacitance All input pins except XIN and XOUT 7 pF
C
IN2
Input Capacitance XIN and XOUT pins 24 pF
I
DD
[3, 4]
V
DD
Supply Current 70 mA
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CY22801
Document #: 001-15571 Rev. *B Page 5 of 7
Test Circuit
Figure 3. Test Circuit Diagram
Timing Definitions
Figure 4. Duty Cycle Definition; DC = t2/t1
Figure 5. Rise and Fall Time Definitions
Notes
5. Skew value guaranteed when outputs are generated from the same divider bank.
6. Jitter measurement may vary. Actual jitter is dependent on input jitter and edge rate, number of active outputs, input and output frequencies, supply voltage, temperature,
and output load. For more information, refer to the application note, Jitter in PLL-based Systems: Causes, Effects, and Solutions.
AC Electrical Characteristics
[2]
Parameter Name Description Min Typ Max Unit
f
REFC
Reference Frequency -
crystal
8–30MHz
f
REFD
Reference Frequency - driven 1 133 MHz
f
OUT
Output Frequency,
Commercial Grade
1–200MHz
Output Frequency, Industrial
Grade
1 166.6 MHz
DC Output Duty Cycle Duty Cycle is defined in Figure 4, 50% of
V
DD
45 50 55 %
t
3
Output Rising Edge Slew
Rate
20% - 80% of V
DD
0.8 1.4 V/ns
t
4
Output Falling Edge Slew
Rate
80% - 20% of V
DD
0.8 1.4 V/ns
t
5
[5]
Skew Output-output skew between related
outputs
––250ps
t
6
[6]
Clock Jitter Peak-to-peak period jitter 250 ps
t
10
PLL Lock Time 3 ms
t1
t2
CLK
50%
50%
t3
CLK
80%
20%
t4
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CY22801
Document #: 001-15571 Rev. *B Page 6 of 7
Package Diagram
Figure 6. 8-Pin (150-Mil) SOIC SZ08
Ordering Information
Ordering Code Package Type Operating Range Operating Voltage
CY22801FXC
[7]
8-Pin SOIC Commercial, 0°C to 70°C 3.3V
CY22801FXI
[7]
8-Pin SOIC Industrial, – 40°C to 85°C 3.3V
CY22801SXC-xxx
[7, 8]
8-Pin SOIC Commercial, 0°C to 70°C 3.3V
CY22801SXC-xxxT
[7, 8]
8-Pin SOIC-Tape and Reel Commercial, 0°C to 70°C 3.3V
CY22801KFXC 8-Pin SOIC Commercial, 0°C to 70°C 3.3V
CY22801KFXCT 8-Pin SOIC-Tape and Reel Commercial, 0°C to 70°C 3.3V
CY22801KFXI 8-Pin SOIC Industrial, – 40°C to 85°C 3.3V
CY22801KFXIT 8-Pin SOIC-Tape and Reel Industrial, – 40°C to 85°C 3.3V
CY22801KSXC-xxx
[8]
8-Pin SOIC Commercial, 0°C to 70°C 3.3V
CY22801KSXC-xxxT
[8]
8-Pin SOIC-Tape and Reel Commercial, 0°C to 70°C 3.3V
CY22801KSXI-xxx
[8]
8-Pin SOIC Industrial, – 40°C to 85°C 3.3V
CY22801KSXI-xxxT
[8]
8-Pin SOIC-Tape and Reel Industrial, – 40°C to 85°C 3.3V
SEATING PLANE
PIN1ID
0.230[5.842]
0.244[6.197]
0.157[3.987]
0.150[3.810]
0.189[4.800]
0.196[4.978]
0.050[1.270]
BSC
0.061[1.549]
0.068[1.727]
0.004[0.102]
0.0098[0.249]
0.0138[0.350]
0.0192[0.487]
0.016[0.406]
0.035[0.889]
0.0075[0.190]
0.0098[0.249]
1. DIMENSIONS IN INCHES[MM] MIN.
MAX.
~8°
0.016[0.406]
0.010[0.254]
X 45°
2. PIN 1 ID IS OPTIONAL,
ROUND ON SINGLE LEADFRAME
RECTANGULAR ON MATRIX LEADFRAME
0.004[0.102]
14
58
3. REFERENCE JEDEC MS-012
PART #
S08.15 STANDARD PKG.
SZ08.15 LEAD FREE PKG.
4. PACKAGE WEIGHT 0.07gms
51-85066-*C
Notes
7. Not recommended for new designs.
8. Ordering codes with “xxx” are factory-programmed configurations. Factory programming is available for high volume orders. For more details, contact your local
Cypress field application engineer or Cypress sales representative.
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CY22801FXCT

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC PROG CLOCK GEN 8-SOIC
Lifecycle:
New from this manufacturer.
Delivery:
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Payment:
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