INMP521
Figure 12. Stereo PDM Microphone Connection to Codec
Decouple the VDD pin of the INMP521 to GND with a 0.1 µF capacitor. Place this capacitor as close to VDD as the printed circuit
board (PCB) layout allows.
Do not use a pull-up or pull-down resistor on the PDM data signal line because the resistor can pull the signal to an incorrect state
during the period that the signal line is tristated.
CLOCK OUTPUT
CODEC
0.1µF
1.8V TO 3.3V
GND
L/R SELECT DA
TA
INMP521
CLK
VDD
DATA INPUT
0.1µF
1.8V TO 3.3V
GND
L/R SELE
CT DATA
INMP521
CLK
VDD
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Revision: 1.1
INMP521
The DATA signal does not need to be buffered in normal use when the INMP521 microphones are placed close to the codec on the
PCB. If the INMP521 must drive the DATA signal over a long cable (>15 cm) or other large capacitive load, a digital buffer may be
needed. Use a signal buffer on the DATA line only when one microphone is in use or after the point where two microphones are
connected (see Figure 13.)
Figure 13. Buffered Connection Between Stereo INMP521 Devices and a Codec
The DATA output of each microphone in a stereo configuration cannot be individually buffered because the two buffer outputs
cannot drive a single signal line. If a buffer is used, take care to select a buffer with low propagation delay so that the timing of the
data connected to the codec is not corrupted.
When long wires are used to connect the codec to the INMP521, a 100 Ω source termination resistor can be used on the clock output
of the codec instead of a buffer to minimize signal over-shoot or ringing. Depending on the drive capability of the codec clock output,
a buffer may still be needed, as shown in Figure 13.
SLEEP MODE
The microphone enters sleep mode when the clock frequency falls below 1 kHz. In sleep mode, the microphone data output
is in a high impedance state. The current consumption of the INMP521 in sleep mode is less than 1 µA at V
DD
= 1.8 V.
The INMP521 enters sleep mode within 1 ms of the clock frequency falling below 1 kHz. The microphone wakes up from sleep mode
32,768 cycles after the clock becomes active. For a 2.4 MHz clock, the microphone begins to output data in 13.7 ms. The wake-up
time, as specified in Table 2, indicates the time from when the clock is enabled to when the INMP521 is consuming its specified
current.
START-UP TIME
The start-up time of the INMP521 from when the clock is active is the same as the wake-up time from sleep mode. The microphone
starts up 32,768 cycles after the clock is active.
CLOCK OUTPUT
CODEC
DATA
INMP521
INMP521
CLK
DATA INPUT
DATA
CLK
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Document Number: DS-INMP521-00
Revision: 1.1
INMP521
SUPPORTING DOCUMENTS
For additional information, see the following documents.
EVALUATION BOARD USER GUIDE
UG-326, PDM Digital Output MEMS Microphone Evaluation Board
UG-335, EVAL-INMP521Z Bottom Port Digital Output MEMS Microphone Evaluation Board
APPLICATION NOTE (PRODUCT SPECIFIC)
AN-0078, High Performance Digital MEMS Microphone Simple Interface to a SigmaDSP Audio Codec
APPLICATION NOTES (GENERAL)
AN-1003, Recommendations for Mounting and Connecting the Invensense, Inc., Bottom-Ported MEMS Microphones
AN-1068, Reflow Soldering of the MEMS Microphone
AN-1112, Microphone Specifications Explained
AN-1124, Recommendations for Sealing Invensense, Inc., Bottom-Port MEMS Microphones from Dust and Liquid Ingress
AN-1140, Microphone Array Beamforming
Page 15 of 21
Document Number: DS-INMP521-00
Revision: 1.1

INMP521ACEZ-R7

Mfr. #:
Manufacturer:
TDK InvenSense
Description:
MIC MEMS DIGITAL OMNI -26DB
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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