6.42
IDT71321SA/LA and IDT71421SA/LA
High Speed 2K x 8 Dual-Port Static RAM with Interrupts Industrial and Commercial Temperature Ranges
2
IDT71321/421J
J52-1
(4)
PLCC
Top View
(5)
NDEX
I/O
A
A
A
A
A
A
A
A
A
I/O
I/O
I/O
1L
2L
3L
4L
5L
6L
7L
8L
9L
0L
1L
3L
2L
OE
A
A
A
A
A
A
A
A
A
A
NC
I/O
R
0R
1R
2R
3R
4R
5R
6R
7R
8R
9R
7R
4
L
5
L
6
L
7
L
N
C
G
N
D
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
I
/
O
0
R
1
R
2
R
3
R
4
R
6
R
5
R
A
0
L
O
E
A
I
N
T
B
U
S
Y
R
/
W
C
E
V
C
E
R
/
W
B
U
S
Y
I
N
T
A
L
1
0
L
L
L
C
C
R
R
R
1
0
R
R
L
L
1
234567474849505152
9
8
10
11
12
13
14
15
16
17
18
19
20
27262524232221 333231302928
35
34
36
37
38
39
40
41
42
43
44
45
46
2691 drw 02
NDEX
IDT71321/421PF or TF
PN64-1 / PP64-1
(4)
64-Pin TQFP
64-Pin STQFP
Top View
(5)
8
9
10
11
12
13
14
15
16
1
2
3
4
5
6
7
46
45
44
43
42
41
40
39
38
37
36
35
34
47
48
33
I/O
6R
N/C
A
0R
A
1R
A
2R
A
3R
A
4R
A
5R
A
6R
A
7R
A
8R
A
9R
I/O
7R
OE
R
N/C
N/C
I/O
2L
A
0L
OE
L
A
1L
A
2L
A
3L
A
4L
A
5L
A
6L
A
7L
A
8L
A
9L
I/O
0L
I/O
1L
N/C
N/C
2691 drw 03
1
7
1
8
1
9
2
0
3
2
3
1
3
0
2
9
2
8
2
7
2
6
2
5
2
4
2
3
2
2
2
1
4
9
5
0
5
1
5
2
6
3
6
2
6
1
6
0
5
9
5
8
5
7
5
6
5
5
5
4
5
3
6
4
N
/
C
A
1
0
R
N
/
C
N
/
C
A
1
0
L
N
/
C
G
N
D
N
/
C
N
/
C
G
N
D
N
/
C
R
/
W
R
C
E
R
V
C
C
V
C
C
B
U
S
Y
L
I
N
T
L
I
/
O
3
L
I
/
O
4
L
I
/
O
5
L
I
/
O
6
L
I
/
O
7
L
I
/
O
0
R
I
/
O
1
R
I
/
O
2
R
I
/
O
3
R
I
/
O
4
R
I
/
O
5
R
R
/
W
L
C
E
L
B
U
S
Y
R
I
N
T
R
Pin Configurations
(1,2,3)
Description
The IDT71321/IDT71421 are high-speed 2K x 8 Dual-Port Static
RAMs with internal interrupt logic for interprocessor communications.
The IDT71321 is designed to be used as a stand-alone 8-bit Dual-
Port Static RAM or as a "MASTER" Dual-Port Static RAM together
with the IDT71421 "SLAVE" Dual-Port in 16-bit-or-more word width
systems. Using the IDT MASTER/SLAVE Dual-Port Static RAM ap-
proach in 16-or-more-bit memory system applications results in full
speed, error-free operation without the need for additional discrete
logic.
Both devices provide two independent ports with separate control,
address, and I/O pins that permit independent, asynchronous access
for reads or writes to any location in memory. An automatic power
down feature, controlled by CE, permits the on chip circuitry of each
port to enter a very low standby power mode.
Fabricated using IDT's CMOS high-performance technology, these
devices typically operate on only 325mW of power. Low-power (LA)
versions offer battery backup data retention capability, with each Dual-
Port typically consuming 200µW from a 2V battery.
The IDT71321/IDT71421 devices are packaged in 52-pin PLCCs,
64-pin TQFPs, and 64-pin STQFPs.
NOTES:
1. All V
CC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
3. J52-1 package body is approximately .75 in x .75 in x .17 in.
PN64-1 package body is approximately 14mm x 14mm x 1.4mm.
PP64-1 package body is approximately 10mm x 10mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.