APT56M50B2 Datasheet APT56M50L, APT56M50B2 | P1-P3

T-Ma x

TM

TO-264

N-Channel MOSFET

Absolute Maximum Ratings

Thermal and Mechanical Characteristics

G

D

S

Single die MOSFET

Unit

A

V

mJ

A

Unit

W

°C/W

°C

oz

g

in·lbf

N·m

Ratings

56

35

175

±30

1200

28

Min Typ Max

780

0.16

0.11

-55 150

300

0.22

6.2

10

1.1

Parameter

Continuous Drain Current @ T

C

= 25°C

Continuous Drain Current @ T

C

= 100°C

Pulsed Drain Current

1

Gate-Source Voltage

Single Pulse Avalanche Energy

2

Avalanche Current,

Repetitive or Non-Repetitive

Characteristic

Total Power Dissipation @ T

C

= 25°C

Junction to Case Thermal Resistance

Case to Sink Thermal Resistance, Flat, Greased Surface

Operating and Storage Junction Temperature Range

Soldering Temperature for 10 Seconds (1.6mm from case)

Package Weight

Mounting Torque ( TO-264 Package), 4-40 or M3 screw

Symbol

I

D

I

DM

V

GS

E

AS

I

AR

Symbol

P

D

R

θ

JC

R

θ

CS

T

J

,T

STG

T

L

W

T

Torque

TYPICAL APPLICATIONS

• PFC and other boost converter

• Buck converter

• Two switch forward (asymmetrical bridge)

• Single switch forward

• Flyback

• Inverters

FEATURES

• Fast switching with low EMI/RFI

• Low R

DS(on)

• Ultra low C

rss

for improved noise immunity

• Low gate charge

• Avalanche energy rated

• RoHS compliant

APT56M50B2

APT56M50L

500V, 56A, 0.10Ω Max

APT56M50B2

APT56M50L

Power MOS 8

™

is a high speed, high voltage N-channel switch-mode power

MOSFET. A proprietary planar stripe design yields excellent reliability and manu-

facturability. Low switching loss is achieved with low input capacitance and ultra

low C

rss

"Miller" capacitance. The intrinsic gate resistance and capacitance of

the poly-silicon gate structure help control slew rates during switching, resulting

in low EMI and reliable paralleling, even when switching at very high frequency.

Reliability in ﬂ yback, boost, forward, and other circuits is enhanced by the high

avalanche energy capability.

Microsemi Website - http://www.microsemi.com

050-8073 Rev C 8-2011

Static Characteristics T

J

= 25°C unless otherwise speciﬁ ed

Source-Drain Diode Characteristics

Dynamic Characteristics T

J

= 25°C unless otherwise speciﬁ ed

1

Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature.

2

Starting at T

J

= 25°C, L = 3.06mH, R

G

= 4.7Ω, I

AS

= 28A.

3

Pulse test: Pulse Width < 380μs, duty cycle < 2%.

4

C

o(cr)

is deﬁ ned as a ﬁ xed capacitance with the same stored charge as C

OSS

with V

DS

= 67% of V

(BR)DSS

.

5 C

o(er)

is deﬁ ned as a ﬁ xed capacitance with the same stored energy as C

OSS

with V

DS

= 67% of V

(BR)DSS

. To calculate C

o(er)

for any

value of V

DS

less than V

(BR)DSS,

use this equation: C

o(er)

= -2.04E-7/V

DS

^2 + 4.76E-8/V

DS

+ 1.36E-10.

6

R

G

is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452)

Microsemi reserves the right to change, without notice, the speciﬁ cations and information contained herein.

G

D

S

Unit

V

V/°C

Ω

V

mV/°C

μA

nA

Unit

A

V

ns

μC

V/ns

Unit

S

pF

nC

ns

Min Typ Max

500

0.60

0.085 0.10

3 4 5

-10

100

500

±100

Min Typ Max

56

175

1

660

13.2

8

Min Typ Max

43

8800

120

945

550

275

220

50

100

38

45

100

33

Test Conditions

V

GS

= 0V, I

D

= 250μA

Reference to 25°C, I

D

= 250μA

V

GS

= 10V, I

D

= 28A

V

GS

= V

DS

, I

D

= 2.5mA

V

DS

= 500V T

J

= 25°C

V

GS

= 0V T

J

= 125°C

V

GS

= ±30V

Test Conditions

MOSFET symbol

showing the

integral reverse p-n

junction diode

(body diode)

I

SD

= 28A, T

J

= 25°C, V

GS

= 0V

I

SD

= 28A

3

di

SD

/dt = 100A/μs, T

J

= 25°C

I

SD

≤ 28A, di/dt ≤1000A/μs, V

DD

= 333V,

T

J

= 125°C

Test Conditions

V

DS

= 50V, I

D

= 28A

V

GS

= 0V, V

DS

= 25V

f = 1MHz

V

GS

= 0V, V

DS

= 0V to 333V

V

GS

= 0 to 10V, I

D

= 28A,

V

DS

= 250V

Resistive Switching

V

DD

= 333V, I

D

= 28A

R

G

= 4.7Ω

6

, V

GG

= 15V

Parameter

Drain-Source Breakdown Voltage

Breakdown Voltage Temperature Coefﬁ cient

Drain-Source On Resistance

3

Gate-Source Threshold Voltage

Threshold Voltage Temperature Coefﬁ cient

Zero Gate Voltage Drain Current

Gate-Source Leakage Current

Parameter

Continuous Source Current

(Body Diode)

Pulsed Source Current

(Body Diode)

1

Diode Forward Voltage

Reverse Recovery Time

Reverse Recovery Charge

Peak Recovery dv/dt

Parameter

Forward Transconductance

Input Capacitance

Reverse Transfer Capacitance

Output Capacitance

Effective Output Capacitance, Charge Related

Effective Output Capacitance, Energy Related

Total Gate Charge

Gate-Source Charge

Gate-Drain Charge

Turn-On Delay Time

Current Rise Time

Turn-Off Delay Time

Current Fall Time

Symbol

V

BR(DSS)

∆V

BR(DSS)

/∆T

J

R

DS(on)

V

GS(th)

∆V

GS(th)

/∆T

J

I

DSS

I

GSS

Symbol

I

S

I

SM

V

SD

t

rr

Q

rr

dv/dt

Symbol

g

fs

C

iss

C

rss

C

oss

C

o(cr)

4

C

o(er)

5

Q

g

Q

gs

Q

gd

t

d(on)

t

r

t

d(off)

t

f

050-8073 Rev C 8-2011

APT56M50B2_L

V

GS

= 7,8 & 10V

4.5V

T

J

= 125°C

T

J

= 25°C

T

J

= -55°C

V

GS

= 10V

6V

5V

V

DS

> I

D(ON)

x R

DS(ON)

MAX.

250μSEC. PULSE TEST

@ <0.5 % DUTY CYCLE

NORMALIZED TO

V

GS

= 10V @ 28A

T

J

= 125°C

T

J

= 25°C

T

J

= -55°C

C

oss

C

iss

I

D

= 28A

V

DS

= 400V

V

DS

= 100V

V

DS

= 250V

T

J

= 125°C

T

J

= 25°C

T

J

= -55°C

T

J

= 150°C

T

J

= 25°C

T

J

= 125°C

T

J

= 150°C

C

rss

V

GS

, GATE-TO-SOURCE VOLTAGE (V) g

fs

, TRANSCONDUCTANCE R

DS(ON)

, DRAIN-TO-SOURCE ON RESISTANCE I

D

, DRAIN CURRENT (A)

I

SD,

REVERSE DRAIN CURRENT (A) C, CAPACITANCE (pF) I

D

, DRAIN CURRENT (A) I

D

, DRIAN CURRENT (A)

V

DS(ON)

, DRAIN-TO-SOURCE VOLTAGE (V) V

DS

, DRAIN-TO-SOURCE VOLTAGE (V)

Figure 1, Output Characteristics Figure 2, Output Characteristics

T

J

, JUNCTION TEMPERATURE (°C) V

GS

, GATE-TO-SOURCE VOLTAGE (V)

Figure 3, R

DS(ON)

vs Junction Temperature Figure 4, Transfer Characteristics

I

D

, DRAIN CURRENT (A) V

DS

, DRAIN-TO-SOURCE VOLTAGE (V)

Figure 5, Gain vs Drain Current Figure 6, Capacitance vs Drain-to-Source Voltage

Q

g

, TOTAL GATE CHARGE (nC) V

SD

, SOURCE-TO-DRAIN VOLTAGE (V)

Figure 7, Gate Charge vs Gate-to-Source Voltage Figure 8, Reverse Drain Current vs Source-to-Drain Voltage

0 5 10 15 20 25 0 5 10 15 20 25 30

-55 -25 0 25 50 75 100 125 150 0 2 4 6 8 10

0 10 20 30 40 50 0 100 200 300 400 500

0 50 100 150 200 250 300 350 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4

200

160

120

80

40

0

2.5

2.0

1.5

1.0

0.5

0

70

60

50

40

30

20

10

0

16

14

12

10

8

6

4

2

0

100

90

80

70

60

50

40

30

20

10

0

175

150

125

100

75

50

25

0

20,000

10,000

1000

100

10

175

150

125

100

75

50

25

0

APT56M50B2_L

050-8073 Rev C 8-2011

APT56M50B2

APT56M50B2

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