TB62214AFNG
2012-04-17
9
Electrical Characteristics 2 (Ta = 25°C, V
M
= 24 V, unless otherwise specified)
Characteristics Symbol
Tes t
Circuit
Test Condition Min Typ. Max Unit
VREF input current I
ref
DC VREF = 3.0 V ⎯ 0 1 μA
VREF decay rate
VREF
(GAIN)
DC VREF = 2.0 V 1/4.8 1/5.0 1/5.2 ⎯
TSD threshold (Note 1) T
j
TSD DC ⎯ 140 150 170 °C
V
M
recovery voltage V
MR
DC ⎯ 7.0 8.0 9.0 V
Overcurrent trip threshold (Note 2) ISD DC ⎯ 2.0 3.0 4.0 A
Supply voltage for internal circuitry VCC DC I
CC
= 5.0 mA 4.75 5.00 5.25 V
Note 1: Thermal shutdown (TSD) circuitry
When the junction temperature of the device has reached the threshold, the TSD circuitry is tripped, causing
the internal reset circuitry to turn off the output transistors.
The TSD circuitry is tripped at a temperature between 140°C (min) and 170°C (max). Once tripped, the TSD
circuitry keeps the output transistors off until both the D_MODE_1 and D_MODE_2 pins are switched to Low
or the TB62214AFNG is rebooted.
The thermal shutdown circuit is provided to turn off all the outputs when the IC is overheated. For this
reason, please avoid using TSD for other purposes.
Note 2: Overcurrent shutdown (ISD) circuitry
When the output current has reached the threshold, the ISD circuitry is tripped, causing the internal reset
circuitry to turn off the output transistors.
To prevent the ISD circuitry from being tripped due to switching noise, it has a masking time of four CR
oscillator cycles. Once tripped, it takes a maximum of four cycles to exit ISD mode and resume normal
operation.
The ISD circuitry remains active until both the D_MODE_1 and D_MODE_2 pins are switched to Low or the
TB62214AFNG is rebooted.
The TB62214AFNG remains in Standby mode while in ISD mode.
Note 3: If the supply voltage for internal circuitry (VCC) is split with an external resistor and used as VREF input
supply voltage, the accuracy of the output current setting will be at
±8% when the VCC output voltage
accuracy and the VREF damping ratio accuracy are combined.
Note 4: The circuit design has been designed so that electromotive force or leak current from signal input does not
occur when VM voltage is not supplied, even if the logic input signal is input. Even so, regulate logic input
signals before resupply of VM voltage so that the motor does not operate when voltage is reapplied.
Back-EMF
While a motor is rotating, there is a timing at which power is fed back to the power supply. At that timing, the
motor current recirculates back to the power supply due to the effect of the motor back-EMF.
If the power supply does not have enough sink capability, the power supply and output pins of the device might
rise above the rated voltages. The magnitude of the motor back-EMF varies with usage conditions and motor
characteristics. It must be fully verified that there is no risk that the TB62214AFNG or other components will be
damaged or fail due to the motor back-EMF.
Cautions on Overcurrent Shutdown (ISD) and Thermal Shutdown (TSD)
The ISD and TSD circuits are only intended to provide temporary protection against irregular conditions such as an
output short-circuit; they do not necessarily guarantee the complete IC safety.
If the device is used beyond the specified operating ranges, these circuits may not operate properly: then the device
may be damaged due to an output short-circuit.
The ISD circuit is only intended to provide a temporary protection against an output short-circuit. If such a
condition persists for a long time, the device may be damaged due to overstress. Overcurrent conditions must be
removed immediately by external hardware.
IC Mounting
Do not insert devices incorrectly or in the wrong orientation. Otherwise, it may cause breakdown, damage and/or
deterioration of the device.
