MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
_______________________________________________________________________________________ 7
Pin Description
Reference InputREFR24
Digital GroundDGND23
Digital Supply, 2.7V to 3.3VDV
DD
22
Data Bit D7 (MSB)D721
7 PD
Power-Down Select
0: Enter DAC standby mode (DACEN = DGND) or power-up DAC (DACEN = DV
DD
).
1: Enter shutdown mode.
3 OUT1N Negative Analog Output, DAC1. Current output for MAX5186; voltage output for MAX5189.
Data Bits D1–D6D1–D615–20
Data Bit D0 (LSB)D014
Digital GroundDGND13
Digital GroundDGND12
Active-Low Reference Enable. Connect to DGND to activate on-chip 1.2V reference.
REN
11
No Connect. Do not connect to this pin.N.C.10
Clock inputCLK9
Active-Low Chip Select
CS
8
NAME FUNCTION
1 CREF1 Reference Bias Bypass, DAC1
2 OUT1P Positive Analog Output, DAC1. Current output for MAX5186; voltage output for MAX5189.
PIN
6 DACEN
DAC Enable, Digital Input
0: Enter DAC standby mode with PD = DGND.
1: Power-up DAC with PD = DGND.
X: Enter shutdown mode with PD = DV
DD
(X = don’t care).
5 AV
DD
Analog Positive Supply, 2.7V to 3.3V
4 AGND Analog Ground
Reference Bias Bypass, DAC2CREF228
Positive Analog Output, DAC2. Current output for MAX5186; voltage output for MAX5189.OUT2P27
Negative Analog Output, DAC2. Current output for MAX5186; voltage output for MAX5189.OUT2N26
Reference OutputREFO25
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
8 _______________________________________________________________________________________
Detailed Description
The MAX5186/MAX5189 are dual, 8-bit digital-to-ana-
log converters (DACs) capable of operating with clock
speeds up to 40MHz. Each of these dual converters
consists of separate input and DAC registers, followed
by a current source array capable of generating up to
1.5mA full-scale output current (Figure 1). An integrat-
ed 1.2V voltage reference and control amplifier deter-
mine the data converters’ full-scale output currents/
voltages. Careful reference design ensures close gain
matching and excellent drift characteristics. The
MAX5189’s voltage output operation features matched
400 on-chip resistors that convert the current array
current into a voltage.
Internal Reference and
Control Amplifier
The MAX5186/MAX5189 provide an integrated
50ppm/°C, 1.2V, low-noise bandgap reference that can
be disabled and overridden by an external reference
voltage. REFO serves either as an external reference
input or an integrated reference output. If REN is con-
nected to DGND, the internal reference is selected and
REFO provides a 1.2V output. Due to its limited 10µA
output drive capability, REFO must be buffered with an
external amplifier if heavier loading is required.
The MAX5186/MAX5189 also employ a control amplifier
designed to simultaneously regulate the full-scale out-
put current (I
FS
) for both outputs of the devices. The
output current is calculated as follows:
I
FS
= 8
I
REF
where I
REF
is the reference output current (I
REF
=
V
REFO
/R
SET
) and I
FS
is the full-scale output current.
R
SET
is the reference resistor that determines the
amplifier’s output current on the MAX5186 (Figure 2).
This current is mirrored into the current source array
where it is equally distributed between matched current
segments and summed to valid output current readings
for the DACs.
The MAX5189 converts each output current (DAC1 and
DAC2) into an output voltage (V
OUT1
, V
OUT2
) with two
internal, ground-referenced 400 load resistors. Using
the internal 1.2V reference voltage, the MAX5189’s inte-
grated reference output-current resistor (R
SET
= 9.6k)
sets I
REF
to 125µA and I
FS
to 1mA.
External Reference
To disable the MAX5186/MAX5189’s internal reference,
connect REN to DV
DD
. A temperature-stable, external
reference may now be applied to drive the REFO pin to
set the full-scale output (Figure 3). Choose a reference
capable of supplying at least 150µA to drive the bias
circuit that generates the cascode current for the cur-
rent array. For improved accuracy and drift perfor-
mance, choose a fixed output voltage reference such
as the 1.2V, 25ppm/°C MAX6520 bandgap reference.
Standby Mode
To enter the lower power standby mode, connect digi-
tal inputs PD and DACEN to DGND. In standby, both
the reference and the control amplifier are active with
the current array inactive. To exit this condition, DACEN
must be pulled high with PD held at DGND. Both the
MAX5186/MAX5189 typically require 50µs to wake up
and let both outputs and reference settle.
Shutdown Mode
For lowest power consumption, the MAX5186/MAX5189
provide a power-down mode in which the reference,
control amplifier, and current array are inactive and the
DACs’ supply current is reduced to 1µA. To enter this
mode, connect PD to DV
DD
. To return to active mode,
connect PD to DGND and DACEN to DV
DD
. About 50µs
are required for the parts to leave shutdown mode and
settle to their outputs’ values prior to shutdown. Table 1
lists the power-down mode selection.
Timing Information
The MAX5186/MAX5189 dual DACs write to their out-
puts simultaneously (Figure 4). On the falling edge of
the clock, the input data for DAC2 is preloaded into a
latch. On the rising edge of the clock, input data for
DAC1 is loaded to the DAC1 register, and the pre-
loaded DAC2 data in the latch is loaded to the DAC2
register.
Outputs
The MAX5186 outputs are designed to supply full-scale
output currents of 1mA into 400 loads in parallel with
a capacitive load of 5pF. The MAX5189 features inte-
grated 400 resistors that restore the array currents to
proportional, differential voltages of 400mV. These dif-
ferential output voltages can then be used to drive a
balun transformer or a low-distortion, high-speed oper-
ational amplifier to convert the differential voltage into a
single-ended voltage.
MAX5186/MAX5189
Dual, 8-Bit, 40MHz, Current/Voltage,
Simultaneous-Output DACs
_______________________________________________________________________________________ 9
Applications Information
Static and Dynamic
Performance Definitions
Integral Nonlinearity (INL)
Integral nonlinearity is the deviation of the values on an
actual transfer function from either a best straight-line fit
(closest approximation to the actual transfer curve) or a
line drawn between the endpoints of the transfer func-
tion, once offset and gain errors have been nullified.
The MAX5186/MAX5189 use a straight-line endpoint fit
for INL (and DNL) and the deviations are measured at
every individual step.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between an
actual step height and the ideal value of 1LSB. A DNL
error specification no more negative than -1LSB guar-
antees a monotonic transfer function.
Offset Error
The offset error is the difference between the ideal and
the actual offset current/voltage. For the MAX5186/
MAX5189, the offset error is the midpoint value of the
transfer function determined by the endpoints of a
straight-line endpoint fit. This error affects all codes by
the same amount.
Gain Error
Gain error is the difference between the ideal and the
actual output value range. This range represents the
output when all digital inputs are set to 1 minus the out-
put when all digital inputs are set to 0.
Glitch Impulse
A glitch is generated when a DAC switches between
two codes. The largest glitch is usually generated
around the midscale transition, when the input pattern
transitions from 011…111 to 100…000. This occurs due
to timing variations between the bits. The glitch impulse
is found by integrating the voltage of the glitch at the
midscale transition over time. The glitch impulse is usu-
ally specified in pV-s.
Settling Time
The settling time is the amount of time required from the
start of a transition until the DAC output settles its new
output value to within the converter’s specified accuracy.
9.6k*
REFR
REFO
1.2V REF
REN
CURRENT-
SOURCE ARRAY
DAC1 SWITCHES
DAC2 SWITCHES
400*
OUT1P
OUT1N
OUT2N
OUT2N
400* 400* 400*
MSB
DECODE
CLK
OUTPUT
LATCHES
OUTPUT
LATCHES
INPUT
LATCHES
*INTERNAL 400 AND 9.6k
RESISTORS FOR MAX5189 ONLY.
INPUT
LATCHES
AV
DD
AGND CS DACEN PD
DV
DD
DGND
CREF1
CREF2
MAX5186
MAX5189
MSB
DECODE
D7D0
Figure 1. Functional Diagram

MAX5189BEEI+

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Digital to Analog Converters - DAC 8-Bit 2Ch High Speed DAC
Lifecycle:
New from this manufacturer.
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