MAX4624EUT+T

a small-signal diode (D1) as shown in Figure 1. If the
analog signal can dip below GND, add D2. Adding
protection diodes reduces the analog range to a diode
drop (about 0.7V) below V+ (for D1), and a diode drop
above ground (for D2). On-resistance increases slightly
at low supply voltages. Maximum supply voltage (V+)
must not exceed +6V.
Adding protection diode D2 causes the logic threshold
to be shifted relative to GND. TTL compatibility is not
guaranteed when D2 is added.
Protection diodes D1 and D2 also protect against some
overvoltage situations. With Figure 1’s circuit, if the sup-
ply voltage is below the absolute maximum rating, and
if a fault voltage up to the absolute maximum rating is
applied to an analog signal pin, no damage will result.
MAX4624/MAX4625
1, Low-Voltage, Single-Supply
SPDT Analog Switches
_______________________________________________________________________________________ 7
t
r
< 5ns
t
f
< 5ns
50%
V
INL
LOGIC
INPUT
R
L
50
COM
GND
IN
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
= V
N_ (
R
L
)
R
L
+ R
ON
V
IN_
V
INH
t
OFF
0V
NO
OR NC
0.9 · V
0UT
0.9 · V
OUT
t
ON
V
OUT
SWITCH
OUTPUT
LOGIC
INPUT
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V+
C
L
35pF
V+
V
OUT
MAX4624
MAX4625
Figure 2. Switching Time
Test Circuits/Timing Diagrams
50%
V
INH
V
INL
LOGIC
INPUT
V
OUT
0.9 · V
OUT
t
D
LOGIC
INPUT
R
L
50
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
IN
NC
V
OUT
V+
V+
C
L
35pF
V
N_
COM
MAX4624
Figure 3a. Break-Before-Make Interval (MAX4624 only)
MAX4624/MAX4625
1, Low-Voltage, Single-Supply
SPDT Analog Switches
8 _______________________________________________________________________________________
LOGIC
INPUT
0.8
V
OUT
0.8
V
OUT
V
INH
V
INL
V
NC
V
NC
V
NO
V
NQ
t
MBB
LOGIC
INPUT
R
L
50
R
L
50
GND
C
L
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO
NC
V
COM
V+
V+
C
L
35pF
C
L
35pF
MAX4625
Figure 3b. Make-Before-Break Interval (MAX4625 only)
V
GEN
GND
COM
C
L
V
OUT
V+
V
OUT
IN
OFF
ON
OFF
V
OUT
Q = (
V
OUT
)(C
L
)
NC
OR NO
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
OFF
ON
OFF
IN
V
INL
TO V
INH
V+
R
GEN
IN
MAX4624
MAX4625
Figure 4. Charge Injection
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
+5V
V
OUT
V+
IN
NC
COM
NO
V
IN
MAX4624
MAX4625
OFF-ISOLATION = 20log
V
OUT
V
IN
ON-LOSS = 20log
V
OUT
V
IN
CROSSTALK = 20log
V
OUT
V
IN
NETWORK
ANALYZER
50
50 50
50
MEAS REF
10nF
0V OR V+
50
GND
Figure 5. On-Loss, Off-Isolation, and Crosstalk
Test Circuits/Timing Diagrams (continued)
MAX4624/MAX4625
1, Low-Voltage, Single-Supply
SPDT Analog Switches
_______________________________________________________________________________________ 9
CAPACITANCE
METER
NC or
NO
COM
GND
IN
V
INL
OR
V
INH
10nF
V+
f = 1MHz
V+
MAX4624
MAX4625
Figure 6. Channel Off/On-Capacitance
TRANSISTOR COUNT: 186
Chip Information

MAX4624EUT+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Analog Switch ICs 1Ohm Low-V SPDT Analog Switch
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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