PL133-97QI-R Datasheet PL133-97QI-R, PL133-97QC, PL133-97QI | P4-P6

PL133-97

Low-Power DC to 150MHz 1:9 Fanout Buffer IC

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22/14 Page 4

ABSOLUTE MAXIMUM CONDITIONS

Supply Voltage to Ground Potential ...... –0.5V to 4.6V

DC Input Voltage ........................... V

SS

– 0.5V to 4.6V

Storage Temperature ........................ –65°C to 150°C

Junction Temperature………………………….. 150°C

Static Discharge Voltage

(per MIL-STD-883, Method 3015)…………..> 2000V

OPERATING CONDITIONS

Parameter

Description

Min.

Max.

Unit

V

DD

Supply Voltage

1.62

3.63

V

T

A

Commercial Operating Temperature (ambient temperature)

0

70

C

Industrial Operating Temperature (ambient temperature)

-40

85

C

C

L

Load Capacitance, below 100 MHz, V

DD

> 2.25V

―

30

pF

Load Capacitance between 100 MHz and 134 MHz, V

DD

> 2.25V

―

10

pF

Load Capacitance, above 134 MHz, V

DD

> 2.25V

―

5

pF

Load Capacitance, below 67MHz, 1.62V < V

DD

< 2.25V

―

15

pF

C

IN

Input Capacitance

―

7

pF

REF, CLK[1:9]

Operating Frequency, Input=Output

DC

150

MHz

t

PU

Power-up time for all V

DD

s to reach minimum specified voltage

(power ramps must be monotonic)

0.05

50

ms

ELECTRICAL CHARACTERISTICS (Commercial and Industrial Temperature Devices)

Parameter

Description

Test Conditions

Min.

Max.

Unit

V

IL

Input LOW Voltage

[1]

V

DD

> 2.25V

–

0.8

V

IH

Input HIGH Voltage

[1]

V

DD

> 2.25V

2.0

–

V

I

IL

Input LOW Current

V

IN

= 0V

–

50

µA

I

IH

Input HIGH Current

V

IN

= V

DD

–

100

µA

V

OL

Output LOW Voltage

[2]

I

OL

= 8 mA

–

0.4

V

OH

Output HIGH Voltage

[2]

I

OH

= –8 mA

2.4

–

V

I

DD

Supply Current

66.67MHz with unloaded outputs

–

32

mA

R

PU

OE Pin Pull-Up Resistance

100

–

K

PL133-97

Low-Power DC to 150MHz 1:9 Fanout Buffer IC

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22/14 Page 5

SWITCHING CHARACTERISTICS (Commercial and Industrial Temperature Devices)

[3]

Parameter

Description

Test Conditions

Min.

Typ.

Max.

Unit

Duty Cycle

[2]

= t2 ÷ t1

Measured at 1.4V, V

DD

=3.3V, Input=50%

40

50

60

%

Measured at V

DD

/2 , Input = 50%

40

50

60

%

t

3

Rise Time

[2]

0.8V  2.0V , V

DD

=3.3V , 30pF Load

–

1.5

ns

10%  90% , V

DD

=2.5V , 15pF Load

–

2.5

ns

10%  90% , V

DD

=1.8V , 15pF Load

–

4.5

ns

t

4

Fall Time

[2]

2.0V  0.8V , V

DD

=3.3V , 30pF Load

–

1.5

ns

90%  10% , V

DD

=2.5V , 15pF Load

–

2.5

ns

90%  10% , V

DD

=1.8V , 15pF Load

–

4.5

ns

t

5

Output to Output Skew

[2]

All outputs equally loaded

–

250

ps

t

6

Propagation Delay, REF Rising

Edge to CLKX Rising Edge

[2]

Measured at V

DD

/2

1

5

9.2

ns

Notes:

1. REF input has a threshold voltage of V

DD

/2

2. Parameter is guaranteed by design and characterization. Not 100% tested i n production.

3. All parameters are specified with loaded outputs.

PL133-97

Low-Power DC to 150MHz 1:9 Fanout Buffer IC

Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1(408) 944 -0800 • fax +1(408) 474 -1000 • www.micrel.com Rev 05/22/14 Page 6

NOISE CHARACTERISTICS (Commercial and Industrial Temperature Devices)

Parameter

Description

Test Conditions

Min.

Typ.

Max.

Unit

Additive Phase Jitter

V

DD

=3.3V, Frequency=100MHz

Offset=12KHz ~ 20MHz

60

fs

-160

-150

-140

-130

-120

-110

-100

-90

-80

-70

-60

10 100 1000 10000 100000 1000000 10000000 100000000

Phase Noise (dBc/Hz)

Offset Frequency (Hz)

PL133-97 Additive Phase Jitter:

VDD=3.3V, CLK=100MHz, Integration Range 12KHz to 20MHz: 0.059ps typical.

REF Input PL133-97 Output

When a buffer is used to pass a signal then the buffer will add a little bit of its own noise. The phase noise on the output of the

buffer will be a little bit more than the phase noise in the input signal. To quantify the noise addition in the buffer we compare the

Phase Jitter numbers from the input and the output. The difference is called "Additive Phase Jitter". The formula for the Additive

Phase Jitter is as follows:

Additive Phase Jitter = (Output Phase Jitter) - (Input Phase Jitter)

22

PL133-97QI-R

PL133-97QI-R

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