ASM3P2854CG-16TR

ASM3P2854C
Rev. 1 | Page 4 of 8 | www.onsemi.com
DC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
V
IL
Input low voltage GND-0.3 0.8 V
V
IH
Input high voltage 2.0 VDD+0.3 V
I
IL
Input low current -35 µA
I
IH
Input high current 35 µA
I
XOL
XOUT output low current (V
XOL
@ 0.4V, VDD = 3.3V) 3 mA
I
XOH
XOUT output high current (V
XOH
@ 2.5V, VDD = 3.3V) 3 mA
V
OL
Output low voltage (VDD = 3.3V, I
OL
= 10mA) 0.4 V
V
OH
Output high voltage (VDD = 3.3V, I
OH
= -10mA) 2.5 V
I
DD
Static supply current
1
15 mA
I
CC
Dynamic supply current ( VDD=3.3V, No Load) 33 mA
VDD Operating Core Voltage 3.0 3.3 3.6 V
VDD_FOUT Operating Output Buffer Voltage 3.0 3.3 3.6 V
t
ON
Power-up time (first locked cycle after power-up)
2
5 mS
Z
O
Output impedance 30
Notes: 1. XIN / CLKIN pin is pulled to GND.
2. VDD and CLKIN inputs are stable.
ASM3P2854C
Rev. 1 | Page 5 of 8 | www.onsemi.com
AC Electrical Characteristics
Symbol Parameter Min Typ Max Unit
XIN / CLKIN Input frequency 24
MHz
F
OUT
Output frequency
At Pin 7 48
At Pin 8 12
At Pins 9 and 10 33
At Pins 12 and 13 66
At Pin 15
1
PCLK
At Pin 16 25
f
d
Frequency Deviation for Spread Spectrum Clocks -0.5 %
t
LH
2
Output rise time (measured from 20% to 80%) 1.0
nS
t
HL
2
Output fall time (measured from 80% to 20%) 1.0
t
JC
Cycle to Cycle Jitter (For Modulated Clocks);
unloaded outputs
±300
pS
t
JP
Period Jitter (For Non-Modulated Clocks) );
unloaded outputs
±275
t
D
Output duty cycle 45 50 55 %
Notes: 1. See the PCLK Selection Table for PCLK Frequency.
2. t
LH
and t
HL
are measured into a capacitive load of 15pF.
Cycle-Cycle Jitter Period Jitter
Jitter=J1=t2-t1
Jitter =J2=t3-t2
ASM3P2854C
Rev. 1 | Page 6 of 8 | www.onsemi.com
Typical Crystal Specifications
Fundamental AT cut parallel resonant crystal
Nominal frequency 24MHz
Frequency tolerance ± 50 ppm or better at 25°C
Operating temperature range -25°C to +85°C
Storage temperature -40°C to +85°C
Load capacitance(C
P
) 18pF
Shunt capacitance 7pF maximum
ESR 25
Note: Note: C
L
is Load Capacitance and Rx is used to prevent oscillations at overtone frequency of the Fundamental frequency.
Typical Crystal Interface Circuit
C
L
= 2*(C
P
– C
S
),
Where C
P
= Load capacitance
of crystal
C
S
= Stray capacitance due to C
IN,
PCB, Trace etc.
Rx
C
L
C
L
Crystal
R

ASM3P2854CG-16TR

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Generators & Support Products 3.3V CUSTOM CG - MFP
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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