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Table 10. COMMANDS
Command DescriptionName
AT:ADC Pn[−Pn[(1V|10V)]]? Get GPIO Pin Analog Voltage Measure the voltage applied to a GPIO pin. The command also
allows measurement of the voltage difference across two GPIO pins.
In differential mode, the full scale range may also be specified as 1 V
or 10 V. Note however that the pin input voltages must not exceed
the range 0..VDD_IO. The command returns the result as fraction of
the full scale range (1 V if none is specified). The GPIO pins
referenced should be initialized to analog mode before issuing this
command.
AT:SPI[(A|B|C|D)]=bytes SPI Transaction This command clocks out bytes on the SPI port. The clock frequency is
312.5 kHz. The command returns the bytes read on MISO during out-
put. Optionally the clocking mode may be specified (default is A):
Mode Clock Inversion Clock Phase
A normal normal
B normal alternate
C inverted normal
D inverted alternate
Note that SEL, if needed, is not generated by this command,
and must instead be driven using standard GPIO commands
(AT:Pn=0|1).
AT:CLK=freq,reffreq Set Clock Generator Output a square wave on the pin(s) set to T mode. The frequency of
the square wave is (freq / 2
16
) × reffreq. Possible values for reffreq
are 20000000, 10000000, 5000000, 2500000, 1250000, 625000,
312500, 156250. Possible values if freq are 065535.
AT:CLK=OFF Turn off Clock Generator Switch off the clock generator
AT:CLK? Get Clock Generator Return the settings of the clock generator. Two numbers are
returned, freq and reffreq.
AT:DAC=value
Set SD DAC Output a SD DAC value on the pin(s) set to T mode. Parameter
value may be in the range −3276832767. The average output
voltage is (1/2 + value / 2
17
) × VDD.
An external low pass filter is needed to get smooth output voltages.
The modulation frequency is 20 MHz. A possible low pass filter
choice is a simple RC low pass filter with R = 10 kW and C = 1 mF.
AT:DAC=OFF
Turn off SD DAC
Switch off the DAC
AT:DAC?
Get SD DAC
Return the DAC value
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Table 10. COMMANDS
Command DescriptionName
AT$TM=mode,config Activates the Sigfox Testmode Available test modes:
0. TX BPSK
Send only BPSK with Synchro Bit + Synchro frame +
PN sequence: No hopping centered on the TX_frequency.
Config bits 0 to 6 define the number of repetitions. Bit 7 of config
defines if a delay is applied of not in the loop
1. TX Protocol:
Tx mode with full protocol with Sigfox key: Send Sigfox protocol
frames with initiate downlink flag = True. Config defines the
number of repetitions.
2. RX Protocol:
This mode tests the complete downlink protocol in Downlink only.
Config defines the number of repetitions.
3. RX GFSK:
RX mode with known pattern with SB + SF + Pattern on
RX_frequency (internal comparison with received frame known
pattern = AA AA B2 27 1F 20 41 84 32 68 C5 BA AE 79 E7 F6 DD
9B. Config defines the number of repetitions. Config defines the
number of repetitions.
4. RX Sensitivity:
Does uplink + downlink frame with Sigfox key and specific timings.
This test is specific to SIGFOX’s test equipments & softwares.
5. TX Synthesis:
Does one uplink frame on each Sigfox channel to measure
frequency synthesis step
AT$SE Starts AT$TM=3,255 indefinitely Convenience command for sensitivity tests
AT$SL[=frame] Send local loop Sends a local loop frame with optional payload of 1 to 12 bytes.
Default payload: 0x84, 0x32, 0x68, 0xC5, 0xBA, 0x53, 0xAE, 0x79,
0xE7, 0xF6, 0xDD, 0x9B.
AT$RL Receive local loop Starts listening for a local loop.
Table 11. REGISTERS
Number Name Description Default Range Units
300 Out Of Band
Period
AX−SFJK sends periodic static
messages to indicate that they are
alive. Set to 0 to disable.
24 0−24 hours
400 LBT Mask LBT configurations to be used. <1>
<15000>
<0>,0
410 Encryption Key
Configuration
Set to zero for normal operation. Set
to one for use with the SIGFOX
Network Emulator Kit (SNEK)
0 0−1 0: private key
1: public key
800 LBT RSSI Offset Shifts the carrier sense threshold.
Positive values result in a lower
threshold.
0 −128−127 dB
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APPLICATION INFORMATION
Typical Application Diagrams
Typical AX−SFJK / AX−SFJK−API Application Diagram
Figure 4. Typical Application Diagram
For detailed application configuration and BOM see the
AX−SFJK Application Note: Sigfox Compliant Reference
Design.

AX-SFJK-1-01-TX30

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
RF System on a Chip - SoC JAPAN AND KOREA RF-MICRO
Lifecycle:
New from this manufacturer.
Delivery:
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