TC7126/A
DS21458D-page 12 2002-2012 Microchip Technology Inc.
6.0 COMPONENT VALUE
SELECTION
6.1 Auto-Zero Capacitor (C
AZ
)
The C
AZ
capacitor size has some influence on system
noise. A 0.47F capacitor is recommended for 200mV
full scale applications where 1LSB is 100V. A 0.033F
capacitor is adequate for 2.0V full scale applications. A
mylar type dielectric capacitor is adequate.
6.2 Reference Voltage Capacitor (C
REF
)
The reference voltage, used to ramp the integrator out-
put voltage back to zero during the reference integrate
phase, is stored on C
REF
. A 0.1F capacitor is accept-
able when V
REF
- is tied to analog common. If a large
Common mode voltage exists (V
REF
- – analog com-
mon) and the application requires a 200mV full scale,
increase C
REF
to 1F. Rollover error will be held to less
than 0.5 count. A Mylar type dielectric capacitor is
adequate.
6.3 Integrating Capacitor (C
INT
)
C
INT
should be selected to maximize integrator output
voltage swing without causing output saturation. Due to
the TC7126A’s superior analog common temperature
coefficient specification, analog common will normally
supply the differential voltage reference. For this case,
a ±2V full scale integrator output swing is satisfactory.
For 3 readings per second (F
OSC
= 48kHz), a 0.047F
value is suggested. For 1 reading per second, 0.15F
is recommended. If a different oscillator frequency is
used, C
INT
must be changed in inverse proportion to
maintain the nominal ±2V integrator swing.
An exact expression for C
INT
is:
EQUATION 6-1:
At 3 readings per second, a 750resistor should be
placed in series with C
INT
. This increases accuracy by
compensating for comparator delay. C
INT
must have
low dielectric absorption to minimize rollover error. A
polypropylene capacitor is recommended.
6.4 Integrating Resistor (R
INT
)
The input buffer amplifier and integrator are designed
with Class A output stages. The output stage idling
current is 6A. The integrator and buffer can supply
1A drive current with negligible linearity errors. R
INT
is
chosen to remain in the output stage linear drive
region, but not so large that PC board leakage currents
induce errors. For a 200mV full scale, R
INT
is 180k. A
2V full scale requires 1.8M
.
Note: F
OSC
= 48kHz (3 readings per sec).
6.5 Oscillator Components
C
OSC
should be 50pF; R
OSC
is selected from the
equation:
EQUATION 6-2:
For a 48kHz clock (3 conversions per second),
R = 180k.
Note that F
OSC
is 44 to generate the TC7126A’s
internal clock. The backplane drive signal is derived by
dividing F
OSC
by 800.
To achieve maximum rejection of 60Hz noise pickup,
the signal integrate period should be a multiple of
60Hz. Oscillator frequencies of 24kHz, 12kHz, 80kHz,
60kHz, 40kHz, etc. should be selected. For 50Hz rejec-
tion, oscillator frequencies of 20kHz, 100kHz,
66-2/3kHz, 50kHz, 40kHz, etc. would be suitable. Note
that 40kHz (2.5 readings per second) will reject both
50Hz and 60Hz.
C
INT
=
(4000)
1
F
OSC
V
FS
R
INT
V
INT
Where:
F
OSC
= Clock frequency at Pin 38
V
FS
= Full scale input voltage
R
INT
= Integrating resistor
V
INT
= Desired full scale integrator output swing
Component
Value
Nominal Full Scale Voltage
200mV 2V
C
AZ
0.33F0.033F
R
INT
180k 1.8M
C
INT
0.047F0.047F
